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[Commit-gnuradio] r10523 - in gnuradio/trunk/usrp2/fpga/eth/rtl/verilog:
From: |
matt |
Subject: |
[Commit-gnuradio] r10523 - in gnuradio/trunk/usrp2/fpga/eth/rtl/verilog: . MAC_tx |
Date: |
Wed, 25 Feb 2009 21:42:34 -0700 (MST) |
Author: matt
Date: 2009-02-25 21:42:33 -0700 (Wed, 25 Feb 2009)
New Revision: 10523
Modified:
gnuradio/trunk/usrp2/fpga/eth/rtl/verilog/MAC_tx.v
gnuradio/trunk/usrp2/fpga/eth/rtl/verilog/MAC_tx/MAC_tx_ctrl.v
Log:
timing fix, delays the ethernet flow control by a cycle to get it across the
chip. Seems ok in testing.
Modified: gnuradio/trunk/usrp2/fpga/eth/rtl/verilog/MAC_tx/MAC_tx_ctrl.v
===================================================================
--- gnuradio/trunk/usrp2/fpga/eth/rtl/verilog/MAC_tx/MAC_tx_ctrl.v
2009-02-26 04:30:02 UTC (rev 10522)
+++ gnuradio/trunk/usrp2/fpga/eth/rtl/verilog/MAC_tx/MAC_tx_ctrl.v
2009-02-26 04:42:33 UTC (rev 10523)
@@ -627,7 +627,15 @@
pause_quanta_sub <=0;
// FIXME The below probably won't work if the pause request comes when we are
in the wrong state
- wire clear_xonxoff = (Current_state==StateSendPauseFrame) &
(IPLengthCounter==17);
+ reg clear_xonxoff;
+ always @(posedge Clk or posedge Reset)
+ if(Reset)
+ clear_xonxoff <= 0;
+ else if((Current_state==StateSendPauseFrame) & (IPLengthCounter==17))
+ clear_xonxoff <= 1;
+ else if(~xon_gen & ~xoff_gen)
+ clear_xonxoff <= 0;
+
always @ (posedge Clk or posedge Reset)
if (Reset)
xoff_gen_complete <=0;
Modified: gnuradio/trunk/usrp2/fpga/eth/rtl/verilog/MAC_tx.v
===================================================================
--- gnuradio/trunk/usrp2/fpga/eth/rtl/verilog/MAC_tx.v 2009-02-26 04:30:02 UTC
(rev 10522)
+++ gnuradio/trunk/usrp2/fpga/eth/rtl/verilog/MAC_tx.v 2009-02-26 04:42:33 UTC
(rev 10523)
@@ -127,6 +127,11 @@
wire MAC_tx_addr_rd ;
wire[7:0] MAC_tx_addr_data ;
+
+ reg xon_gen_d1, xoff_gen_d1;
+ always @(posedge Clk) xon_gen_d1 <= xon_gen;
+ always @(posedge Clk) xoff_gen_d1 <= xoff_gen;
+
//******************************************************************************
//instantiation
//******************************************************************************
@@ -147,9 +152,9 @@
//flow control (//flow control ),
.pause_apply (pause_apply ),
.pause_quanta_sub (pause_quanta_sub ),
-.xoff_gen (xoff_gen ),
+.xoff_gen (xoff_gen_d1 ),
.xoff_gen_complete (xoff_gen_complete ),
-.xon_gen (xon_gen ),
+.xon_gen (xon_gen_d1 ),
.xon_gen_complete (xon_gen_complete ),
//MAC_tx_FF (//MAC_tx_FF ),
.Fifo_data (Fifo_data ),
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matt <=