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[Qemu-ppc] [PULL 04/15] sm501: Add some more unimplemented registers
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 04/15] sm501: Add some more unimplemented registers |
Date: |
Wed, 3 Jan 2018 15:24:08 +1100 |
From: BALATON Zoltan <address@hidden>
These are not really implemented (just return zero or default values)
but add these so guests accessing them can run.
Signed-off-by: BALATON Zoltan <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/display/sm501.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/hw/display/sm501.c b/hw/display/sm501.c
index b9b611131e..4f7dc59b25 100644
--- a/hw/display/sm501.c
+++ b/hw/display/sm501.c
@@ -795,6 +795,8 @@ static uint64_t sm501_system_config_read(void *opaque,
hwaddr addr,
case SM501_ARBTRTN_CONTROL:
ret = s->arbitration_control;
break;
+ case SM501_COMMAND_LIST_STATUS:
+ ret = 0x00180002; /* FIFOs are empty, everything idle */
case SM501_IRQ_MASK:
ret = s->irq_mask;
break;
@@ -812,6 +814,9 @@ static uint64_t sm501_system_config_read(void *opaque,
hwaddr addr,
case SM501_POWER_MODE_CONTROL:
ret = s->power_mode_control;
break;
+ case SM501_ENDIAN_CONTROL:
+ ret = 0; /* Only default little endian mode is supported */
+ break;
default:
printf("sm501 system config : not implemented register read."
@@ -865,6 +870,12 @@ static void sm501_system_config_write(void *opaque, hwaddr
addr,
case SM501_POWER_MODE_CONTROL:
s->power_mode_control = value & 0x00000003;
break;
+ case SM501_ENDIAN_CONTROL:
+ if (value & 0x00000001) {
+ printf("sm501 system config : big endian mode not implemented.\n");
+ abort();
+ }
+ break;
default:
printf("sm501 system config : not implemented register write."
@@ -924,6 +935,9 @@ static uint64_t sm501_disp_ctrl_read(void *opaque, hwaddr
addr,
case SM501_DC_PANEL_PANNING_CONTROL:
ret = s->dc_panel_panning_control;
break;
+ case SM501_DC_PANEL_COLOR_KEY:
+ /* Not implemented yet */
+ break;
case SM501_DC_PANEL_FB_ADDR:
ret = s->dc_panel_fb_addr;
break;
@@ -1035,6 +1049,9 @@ static void sm501_disp_ctrl_write(void *opaque, hwaddr
addr,
case SM501_DC_PANEL_PANNING_CONTROL:
s->dc_panel_panning_control = value & 0xFF3FFF3F;
break;
+ case SM501_DC_PANEL_COLOR_KEY:
+ /* Not implemented yet */
+ break;
case SM501_DC_PANEL_FB_ADDR:
s->dc_panel_fb_addr = value & 0x8FFFFFF0;
break;
--
2.14.3
- [Qemu-ppc] [PULL 00/15] ppc-for-2.12 queue 20180103, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 01/15] target-ppc: optimize cmp translation, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 03/15] sm501: Add panel hardware cursor registers also to read function, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 10/15] target/ppc: Clean up probing of VMX, VSX and DFP availability on KVM, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 04/15] sm501: Add some more unimplemented registers,
David Gibson <=
- [Qemu-ppc] [PULL 15/15] target/ppc: more use of the PPC_*() macros, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 12/15] spapr: Handle Decimal Floating Point (DFP) as an optional capability, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 05/15] ppc4xx_i2c: Implement basic I2C functions, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 06/15] ppc/pnv: change powernv_ prefix to pnv_ for overall naming consistency, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 14/15] hw/ide: Emulate SiI3112 SATA controller, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 07/15] spapr: Capabilities infrastructure, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 08/15] spapr: Treat Hardware Transactional Memory (HTM) as an optional capability, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 11/15] spapr: Handle VMX/VSX presence as an spapr capability flag, David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 13/15] spapr_pci: use warn_report(), David Gibson, 2018/01/02
- [Qemu-ppc] [PULL 09/15] spapr: Validate capabilities on migration, David Gibson, 2018/01/02