[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 40/41] rust: pl011: fix migration stream
From: |
Paolo Bonzini |
Subject: |
[PULL 40/41] rust: pl011: fix migration stream |
Date: |
Thu, 19 Dec 2024 09:32:27 +0100 |
The Rust vmstate macros lack the type-safety of their C equivalents (so
safe, much abstraction), and therefore they were predictably wrong.
The registers have already been changed to 32-bits in the previous patch,
but read_pos/read_count/read_trigger also have to be u32 instead of usize.
The easiest way to do so is to let the FIFO use u32 indices instead
of usize.
My plan for making VMStateField typesafe is to have a trait to retrieve
a basic VMStateField; for example something like vmstate_uint32 would
become an implementation of the VMState trait on u32. Then you'd write
something like "vmstate_of!(Type, field).with_version_id(2)". That is,
vmstate_of retrieves the basic VMStateField and fills in the offset,
and then more changes can be applied on top.
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
rust/hw/char/pl011/src/device.rs | 38 ++++++++++++++++++++++----
rust/hw/char/pl011/src/device_class.rs | 10 +++----
rust/qemu-api/src/vmstate.rs | 22 ---------------
3 files changed, 37 insertions(+), 33 deletions(-)
diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs
index 090e5d64504..4d620b442ed 100644
--- a/rust/hw/char/pl011/src/device.rs
+++ b/rust/hw/char/pl011/src/device.rs
@@ -31,7 +31,7 @@
const FBRD_MASK: u32 = 0x3f;
/// QEMU sourced constant.
-pub const PL011_FIFO_DEPTH: usize = 16_usize;
+pub const PL011_FIFO_DEPTH: u32 = 16;
#[derive(Clone, Copy, Debug)]
enum DeviceId {
@@ -56,6 +56,32 @@ impl DeviceId {
const PL011_ID_LUMINARY: [c_uchar; 8] = [0x11, 0x00, 0x18, 0x01, 0x0d,
0xf0, 0x05, 0xb1];
}
+// FIFOs use 32-bit indices instead of usize, for compatibility with
+// the migration stream produced by the C version of this device.
+#[repr(transparent)]
+#[derive(Debug, Default)]
+pub struct Fifo([registers::Data; PL011_FIFO_DEPTH as usize]);
+
+impl Fifo {
+ const fn len(&self) -> u32 {
+ self.0.len() as u32
+ }
+}
+
+impl std::ops::IndexMut<u32> for Fifo {
+ fn index_mut(&mut self, idx: u32) -> &mut Self::Output {
+ &mut self.0[idx as usize]
+ }
+}
+
+impl std::ops::Index<u32> for Fifo {
+ type Output = registers::Data;
+
+ fn index(&self, idx: u32) -> &Self::Output {
+ &self.0[idx as usize]
+ }
+}
+
#[repr(C)]
#[derive(Debug, qemu_api_macros::Object, qemu_api_macros::offsets)]
/// PL011 Device Model in QEMU
@@ -73,14 +99,14 @@ pub struct PL011State {
pub dmacr: u32,
pub int_enabled: u32,
pub int_level: u32,
- pub read_fifo: [registers::Data; PL011_FIFO_DEPTH],
+ pub read_fifo: Fifo,
pub ilpr: u32,
pub ibrd: u32,
pub fbrd: u32,
pub ifl: u32,
- pub read_pos: usize,
- pub read_count: usize,
- pub read_trigger: usize,
+ pub read_pos: u32,
+ pub read_count: u32,
+ pub read_trigger: u32,
#[doc(alias = "chr")]
pub char_backend: CharBackend,
/// QEMU interrupts
@@ -480,7 +506,7 @@ pub fn loopback_enabled(&self) -> bool {
}
#[inline]
- pub fn fifo_depth(&self) -> usize {
+ pub fn fifo_depth(&self) -> u32 {
// Note: FIFO depth is expected to be power-of-2
if self.fifo_enabled() {
return PL011_FIFO_DEPTH;
diff --git a/rust/hw/char/pl011/src/device_class.rs
b/rust/hw/char/pl011/src/device_class.rs
index 975c3d42be7..7f3ca895071 100644
--- a/rust/hw/char/pl011/src/device_class.rs
+++ b/rust/hw/char/pl011/src/device_class.rs
@@ -6,8 +6,8 @@
use std::os::raw::{c_int, c_void};
use qemu_api::{
- bindings::*, c_str, vmstate_clock, vmstate_fields, vmstate_int32,
vmstate_subsections,
- vmstate_uint32, vmstate_uint32_array, vmstate_unused, zeroable::Zeroable,
+ bindings::*, c_str, vmstate_clock, vmstate_fields, vmstate_subsections,
vmstate_uint32,
+ vmstate_uint32_array, vmstate_unused, zeroable::Zeroable,
};
use crate::device::{PL011State, PL011_FIFO_DEPTH};
@@ -64,9 +64,9 @@ extern "C" fn pl011_post_load(opaque: *mut c_void,
version_id: c_int) -> c_int {
vmstate_uint32!(ibrd, PL011State),
vmstate_uint32!(fbrd, PL011State),
vmstate_uint32!(ifl, PL011State),
- vmstate_int32!(read_pos, PL011State),
- vmstate_int32!(read_count, PL011State),
- vmstate_int32!(read_trigger, PL011State),
+ vmstate_uint32!(read_pos, PL011State),
+ vmstate_uint32!(read_count, PL011State),
+ vmstate_uint32!(read_trigger, PL011State),
},
subsections: vmstate_subsections! {
VMSTATE_PL011_CLOCK
diff --git a/rust/qemu-api/src/vmstate.rs b/rust/qemu-api/src/vmstate.rs
index 25c68b703ea..63c897abcdf 100644
--- a/rust/qemu-api/src/vmstate.rs
+++ b/rust/qemu-api/src/vmstate.rs
@@ -106,28 +106,6 @@ macro_rules! vmstate_uint32 {
}};
}
-#[doc(alias = "VMSTATE_INT32_V")]
-#[macro_export]
-macro_rules! vmstate_int32_v {
- ($field_name:ident, $struct_name:ty, $version_id:expr) => {{
- $crate::vmstate_single!(
- $field_name,
- $struct_name,
- $version_id,
- ::core::ptr::addr_of!($crate::bindings::vmstate_info_int32),
- ::core::mem::size_of::<i32>()
- )
- }};
-}
-
-#[doc(alias = "VMSTATE_INT32")]
-#[macro_export]
-macro_rules! vmstate_int32 {
- ($field_name:ident, $struct_name:ty) => {{
- $crate::vmstate_int32_v!($field_name, $struct_name, 0)
- }};
-}
-
#[doc(alias = "VMSTATE_ARRAY")]
#[macro_export]
macro_rules! vmstate_array {
--
2.47.1
- [PULL 29/41] rust: tests: allow writing more than one test, (continued)
- [PULL 29/41] rust: tests: allow writing more than one test, Paolo Bonzini, 2024/12/19
- [PULL 30/41] rust: qom: add casting functionality, Paolo Bonzini, 2024/12/19
- [PULL 32/41] rust: qemu-api: add a module to wrap functions and zero-sized closures, Paolo Bonzini, 2024/12/19
- [PULL 33/41] kvm: consistently return 0/-errno from kvm_convert_memory, Paolo Bonzini, 2024/12/19
- [PULL 31/41] rust: qom: add initial subset of methods on Object, Paolo Bonzini, 2024/12/19
- [PULL 34/41] target/i386: Reset TSCs of parked vCPUs too on VM reset, Paolo Bonzini, 2024/12/19
- [PULL 35/41] rust: pl011: fix declaration of LineControl bits, Paolo Bonzini, 2024/12/19
- [PULL 36/41] rust: pl011: match break logic of C version, Paolo Bonzini, 2024/12/19
- [PULL 37/41] rust: pl011: always use reset() method on registers, Paolo Bonzini, 2024/12/19
- [PULL 38/41] rust: pl011: fix break errors and definition of Data struct, Paolo Bonzini, 2024/12/19
- [PULL 40/41] rust: pl011: fix migration stream,
Paolo Bonzini <=
- [PULL 39/41] rust: pl011: extend registers to 32 bits, Paolo Bonzini, 2024/12/19
- [PULL 41/41] rust: pl011: simplify handling of the FIFO enabled bit in LCR, Paolo Bonzini, 2024/12/19
- Re: [PULL 00/41] Rust, qdev, target/i386 changes for 2024-12-19, Richard Henderson, 2024/12/19