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[PULL 12/72] target/ppc: Set FloatInfZeroNaNRule explicitly
From: |
Peter Maydell |
Subject: |
[PULL 12/72] target/ppc: Set FloatInfZeroNaNRule explicitly |
Date: |
Wed, 11 Dec 2024 16:19:04 +0000 |
Set the FloatInfZeroNaNRule explicitly for the PPC target,
so we can remove the ifdef from pickNaNMulAdd().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-8-peter.maydell@linaro.org
---
target/ppc/cpu_init.c | 7 +++++++
fpu/softfloat-specialize.c.inc | 7 +------
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index efcb80d1c25..f18908a643a 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7270,6 +7270,13 @@ static void ppc_cpu_reset_hold(Object *obj, ResetType
type)
*/
set_float_2nan_prop_rule(float_2nan_prop_ab, &env->fp_status);
set_float_2nan_prop_rule(float_2nan_prop_ab, &env->vec_status);
+ /*
+ * For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
+ * to return an input NaN if we have one (ie c) rather than generating
+ * a default NaN
+ */
+ set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->fp_status);
+ set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->vec_status);
for (i = 0; i < ARRAY_SIZE(env->spr_cb); i++) {
ppc_spr_t *spr = &env->spr_cb[i];
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
index db914ddbb1c..2023b2bd632 100644
--- a/fpu/softfloat-specialize.c.inc
+++ b/fpu/softfloat-specialize.c.inc
@@ -503,18 +503,13 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass
b_cls, FloatClass c_cls,
*/
rule = float_infzeronan_dnan_never;
}
-#elif defined(TARGET_PPC) || defined(TARGET_SPARC) || \
+#elif defined(TARGET_SPARC) || \
defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \
defined(TARGET_I386) || defined(TARGET_LOONGARCH)
/*
* For LoongArch systems that conform to IEEE754-2008, the
(inf,zero,nan)
* case sets InvalidOp and returns the input value 'c'
*/
- /*
- * For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
- * to return an input NaN if we have one (ie c) rather than generating
- * a default NaN
- */
rule = float_infzeronan_dnan_never;
#endif
}
--
2.34.1
- [PULL 01/72] hw/net/lan9118: Extract lan9118_phy, (continued)
- [PULL 01/72] hw/net/lan9118: Extract lan9118_phy, Peter Maydell, 2024/12/11
- [PULL 04/72] hw/net/lan9118_phy: Reuse MII constants, Peter Maydell, 2024/12/11
- [PULL 05/72] hw/net/lan9118_phy: Add missing 100 mbps full duplex advertisement, Peter Maydell, 2024/12/11
- [PULL 06/72] fpu: handle raising Invalid for infzero in pick_nan_muladd, Peter Maydell, 2024/12/11
- [PULL 02/72] hw/net/lan9118_phy: Reuse in imx_fec and consolidate implementations, Peter Maydell, 2024/12/11
- [PULL 07/72] fpu: Check for default_nan_mode before calling pickNaNMulAdd, Peter Maydell, 2024/12/11
- [PULL 08/72] softfloat: Allow runtime choice of inf * 0 + NaN result, Peter Maydell, 2024/12/11
- [PULL 09/72] tests/fp: Explicitly set inf-zero-nan rule, Peter Maydell, 2024/12/11
- [PULL 10/72] target/arm: Set FloatInfZeroNaNRule explicitly, Peter Maydell, 2024/12/11
- [PULL 11/72] target/s390: Set FloatInfZeroNaNRule explicitly, Peter Maydell, 2024/12/11
- [PULL 12/72] target/ppc: Set FloatInfZeroNaNRule explicitly,
Peter Maydell <=
- [PULL 13/72] target/mips: Set FloatInfZeroNaNRule explicitly, Peter Maydell, 2024/12/11
- [PULL 14/72] target/sparc: Set FloatInfZeroNaNRule explicitly, Peter Maydell, 2024/12/11
- [PULL 15/72] target/xtensa: Set FloatInfZeroNaNRule explicitly, Peter Maydell, 2024/12/11
- [PULL 16/72] target/x86: Set FloatInfZeroNaNRule explicitly, Peter Maydell, 2024/12/11
- [PULL 19/72] softfloat: Pass have_snan to pickNaNMulAdd, Peter Maydell, 2024/12/11
- [PULL 17/72] target/loongarch: Set FloatInfZeroNaNRule explicitly, Peter Maydell, 2024/12/11
- [PULL 18/72] target/hppa: Set FloatInfZeroNaNRule explicitly, Peter Maydell, 2024/12/11
- [PULL 20/72] softfloat: Allow runtime choice of NaN propagation for muladd, Peter Maydell, 2024/12/11
- [PULL 23/72] target/loongarch: Set Float3NaNPropRule explicitly, Peter Maydell, 2024/12/11
- [PULL 24/72] target/ppc: Set Float3NaNPropRule explicitly, Peter Maydell, 2024/12/11