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Re: [PATCH-for-10.0 3/3] hw/char/riscv_htif: Clarify MemoryRegionOps exp
From: |
Alistair Francis |
Subject: |
Re: [PATCH-for-10.0 3/3] hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses |
Date: |
Tue, 3 Dec 2024 14:56:00 +0900 |
On Sat, Nov 30, 2024 at 12:45 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Looking at htif_mm_ops[] read/write handlers, we notice they
> expect 32-bit values to accumulate into to the 'fromhost' and
> 'tohost' 64-bit variables. Explicit by setting the .impl
> min/max fields.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> Notes
>
> 1/ these variables belong to HTIFState but are declared statically!
>
> static uint64_t fromhost_addr, tohost_addr, begin_sig_addr, end_sig_addr;
>
> 2/ I believe a 64-bit implementation would simplify the logic.
>
> 3/ This is a non-QOM device model!
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> hw/char/riscv_htif.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c
> index 3f84d8d6738..db69b5e3ca7 100644
> --- a/hw/char/riscv_htif.c
> +++ b/hw/char/riscv_htif.c
> @@ -325,6 +325,10 @@ static const MemoryRegionOps htif_mm_ops = {
> .read = htif_mm_read,
> .write = htif_mm_write,
> .endianness = DEVICE_LITTLE_ENDIAN,
> + .impl = {
> + .min_access_size = 4,
> + .max_access_size = 4,
> + },
> };
>
> HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr,
> --
> 2.45.2
>
>
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