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[PULL v3 32/32] intel_iommu: add present bit check for pasid table entri
From: |
Michael S. Tsirkin |
Subject: |
[PULL v3 32/32] intel_iommu: add present bit check for pasid table entries |
Date: |
Sun, 5 Jan 2020 08:00:05 -0500 |
From: Liu Yi L <address@hidden>
The present bit check for pasid entry (pe) and pasid directory
entry (pdire) were missed in previous commits as fpd bit check
doesn't require present bit as "Set". This patch adds the present
bit check for callers which wants to get a valid pe/pdire.
Cc: address@hidden
Cc: Kevin Tian <address@hidden>
Cc: Jacob Pan <address@hidden>
Cc: Peter Xu <address@hidden>
Cc: Yi Sun <address@hidden>
Reviewed-by: Peter Xu <address@hidden>
Signed-off-by: Liu Yi L <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Peter Xu <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
hw/i386/intel_iommu_internal.h | 1 +
hw/i386/intel_iommu.c | 92 +++++++++++++++++++++++++++-------
2 files changed, 74 insertions(+), 19 deletions(-)
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index edcf9fc9bb..862033ebe6 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -479,6 +479,7 @@ typedef struct VTDRootEntry VTDRootEntry;
#define VTD_PASID_ENTRY_FPD (1ULL << 1) /* Fault Processing Disable
*/
/* PASID Granular Translation Type Mask */
+#define VTD_PASID_ENTRY_P 1ULL
#define VTD_SM_PASID_ENTRY_PGTT (7ULL << 6)
#define VTD_SM_PASID_ENTRY_FLT (1ULL << 6)
#define VTD_SM_PASID_ENTRY_SLT (2ULL << 6)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 609b80750a..a523ef0e65 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -686,9 +686,18 @@ static inline bool vtd_pe_type_check(X86IOMMUState
*x86_iommu,
return true;
}
-static int vtd_get_pasid_dire(dma_addr_t pasid_dir_base,
- uint32_t pasid,
- VTDPASIDDirEntry *pdire)
+static inline bool vtd_pdire_present(VTDPASIDDirEntry *pdire)
+{
+ return pdire->val & 1;
+}
+
+/**
+ * Caller of this function should check present bit if wants
+ * to use pdir entry for futher usage except for fpd bit check.
+ */
+static int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base,
+ uint32_t pasid,
+ VTDPASIDDirEntry *pdire)
{
uint32_t index;
dma_addr_t addr, entry_size;
@@ -703,18 +712,22 @@ static int vtd_get_pasid_dire(dma_addr_t pasid_dir_base,
return 0;
}
-static int vtd_get_pasid_entry(IntelIOMMUState *s,
- uint32_t pasid,
- VTDPASIDDirEntry *pdire,
- VTDPASIDEntry *pe)
+static inline bool vtd_pe_present(VTDPASIDEntry *pe)
+{
+ return pe->val[0] & VTD_PASID_ENTRY_P;
+}
+
+static int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s,
+ uint32_t pasid,
+ dma_addr_t addr,
+ VTDPASIDEntry *pe)
{
uint32_t index;
- dma_addr_t addr, entry_size;
+ dma_addr_t entry_size;
X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);
index = VTD_PASID_TABLE_INDEX(pasid);
entry_size = VTD_PASID_ENTRY_SIZE;
- addr = pdire->val & VTD_PASID_TABLE_BASE_ADDR_MASK;
addr = addr + index * entry_size;
if (dma_memory_read(&address_space_memory, addr, pe, entry_size)) {
return -VTD_FR_PASID_TABLE_INV;
@@ -732,25 +745,54 @@ static int vtd_get_pasid_entry(IntelIOMMUState *s,
return 0;
}
-static int vtd_get_pasid_entry_from_pasid(IntelIOMMUState *s,
- dma_addr_t pasid_dir_base,
- uint32_t pasid,
- VTDPASIDEntry *pe)
+/**
+ * Caller of this function should check present bit if wants
+ * to use pasid entry for futher usage except for fpd bit check.
+ */
+static int vtd_get_pe_from_pdire(IntelIOMMUState *s,
+ uint32_t pasid,
+ VTDPASIDDirEntry *pdire,
+ VTDPASIDEntry *pe)
+{
+ dma_addr_t addr = pdire->val & VTD_PASID_TABLE_BASE_ADDR_MASK;
+
+ return vtd_get_pe_in_pasid_leaf_table(s, pasid, addr, pe);
+}
+
+/**
+ * This function gets a pasid entry from a specified pasid
+ * table (includes dir and leaf table) with a specified pasid.
+ * Sanity check should be done to ensure return a present
+ * pasid entry to caller.
+ */
+static int vtd_get_pe_from_pasid_table(IntelIOMMUState *s,
+ dma_addr_t pasid_dir_base,
+ uint32_t pasid,
+ VTDPASIDEntry *pe)
{
int ret;
VTDPASIDDirEntry pdire;
- ret = vtd_get_pasid_dire(pasid_dir_base, pasid, &pdire);
+ ret = vtd_get_pdire_from_pdir_table(pasid_dir_base,
+ pasid, &pdire);
if (ret) {
return ret;
}
- ret = vtd_get_pasid_entry(s, pasid, &pdire, pe);
+ if (!vtd_pdire_present(&pdire)) {
+ return -VTD_FR_PASID_TABLE_INV;
+ }
+
+ ret = vtd_get_pe_from_pdire(s, pasid, &pdire, pe);
if (ret) {
return ret;
}
- return ret;
+ if (!vtd_pe_present(pe)) {
+ return -VTD_FR_PASID_TABLE_INV;
+ }
+
+ return 0;
}
static int vtd_ce_get_rid2pasid_entry(IntelIOMMUState *s,
@@ -763,7 +805,7 @@ static int vtd_ce_get_rid2pasid_entry(IntelIOMMUState *s,
pasid = VTD_CE_GET_RID2PASID(ce);
pasid_dir_base = VTD_CE_GET_PASID_DIR_TABLE(ce);
- ret = vtd_get_pasid_entry_from_pasid(s, pasid_dir_base, pasid, pe);
+ ret = vtd_get_pe_from_pasid_table(s, pasid_dir_base, pasid, pe);
return ret;
}
@@ -781,7 +823,11 @@ static int vtd_ce_get_pasid_fpd(IntelIOMMUState *s,
pasid = VTD_CE_GET_RID2PASID(ce);
pasid_dir_base = VTD_CE_GET_PASID_DIR_TABLE(ce);
- ret = vtd_get_pasid_dire(pasid_dir_base, pasid, &pdire);
+ /*
+ * No present bit check since fpd is meaningful even
+ * if the present bit is clear.
+ */
+ ret = vtd_get_pdire_from_pdir_table(pasid_dir_base, pasid, &pdire);
if (ret) {
return ret;
}
@@ -791,7 +837,15 @@ static int vtd_ce_get_pasid_fpd(IntelIOMMUState *s,
return 0;
}
- ret = vtd_get_pasid_entry(s, pasid, &pdire, &pe);
+ if (!vtd_pdire_present(&pdire)) {
+ return -VTD_FR_PASID_TABLE_INV;
+ }
+
+ /*
+ * No present bit check since fpd is meaningful even
+ * if the present bit is clear.
+ */
+ ret = vtd_get_pe_from_pdire(s, pasid, &pdire, &pe);
if (ret) {
return ret;
}
--
MST
- [PULL v3 21/32] hw/pci/pci_host: Remove redundant PCI_DPRINTF(), (continued)
- [PULL v3 21/32] hw/pci/pci_host: Remove redundant PCI_DPRINTF(), Michael S. Tsirkin, 2020/01/05
- [PULL v3 22/32] hw/pci/pci_host: Let pci_data_[read/write] use unsigned 'size' argument, Michael S. Tsirkin, 2020/01/05
- [PULL v3 23/32] vhost-user: add VHOST_USER_RESET_DEVICE to reset devices, Michael S. Tsirkin, 2020/01/05
- [PULL v3 24/32] vhost-user-scsi: reset the device if supported, Michael S. Tsirkin, 2020/01/05
- [PULL v3 25/32] hw: fix using 4.2 compat in 5.0 machine types for i440fx/q35, Michael S. Tsirkin, 2020/01/05
- [PULL v3 26/32] virtio: make seg_max virtqueue size dependent, Michael S. Tsirkin, 2020/01/05
- [PULL v3 28/32] virtio-mmio: update queue size on guest write, Michael S. Tsirkin, 2020/01/05
- [PULL v3 29/32] virtio: reset region cache when on queue deletion, Michael S. Tsirkin, 2020/01/05
- [PULL v3 30/32] virtio-net: delete also control queue when TX/RX deleted, Michael S. Tsirkin, 2020/01/05
- [PULL v3 31/32] intel_iommu: a fix to vtd_find_as_from_bus_num(), Michael S. Tsirkin, 2020/01/05
- [PULL v3 32/32] intel_iommu: add present bit check for pasid table entries,
Michael S. Tsirkin <=
- [PULL v3 27/32] tests: add virtio-scsi and virtio-blk seg_max_adjust test, Michael S. Tsirkin, 2020/01/05
- Re: [PULL v3 00/32] virtio, pci, pc: fixes, features, Peter Maydell, 2020/01/06
- [PULL v3 00/32] virtio, pci, pc: fixes, features, Michael S. Tsirkin, 2020/01/07
- [PULL v3 01/32] virtio: add ability to delete vq through a pointer, Michael S. Tsirkin, 2020/01/07
- [PULL v3 02/32] virtio: make virtio_delete_queue idempotent, Michael S. Tsirkin, 2020/01/07
- [PULL v3 03/32] virtio-balloon: fix memory leak while attach virtio-balloon device, Michael S. Tsirkin, 2020/01/07
- [PULL v3 04/32] virtio-serial-bus: fix memory leak while attach virtio-serial-bus, Michael S. Tsirkin, 2020/01/07
- [PULL v3 05/32] virtio-input: convert to new virtio_delete_queue, Michael S. Tsirkin, 2020/01/07
- [PULL v3 06/32] intel_iommu: fix bug to read DMAR_RTADDR_REG, Michael S. Tsirkin, 2020/01/07