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[PATCH v25 12/22] target/rx: Collect all bytes during disassembly
From: |
Yoshinori Sato |
Subject: |
[PATCH v25 12/22] target/rx: Collect all bytes during disassembly |
Date: |
Fri, 27 Sep 2019 15:22:52 +0900 |
From: Richard Henderson <address@hidden>
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Yoshinori Sato <address@hidden>
Signed-off-by: Yoshinori Sato <address@hidden>
Message-Id: <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/rx/disas.c | 62 ++++++++++++++++++++++++++++++++---------------
1 file changed, 42 insertions(+), 20 deletions(-)
diff --git a/target/rx/disas.c b/target/rx/disas.c
index ebc1a44249..5a32a87534 100644
--- a/target/rx/disas.c
+++ b/target/rx/disas.c
@@ -25,43 +25,59 @@ typedef struct DisasContext {
disassemble_info *dis;
uint32_t addr;
uint32_t pc;
+ uint8_t len;
+ uint8_t bytes[8];
} DisasContext;
static uint32_t decode_load_bytes(DisasContext *ctx, uint32_t insn,
- int i, int n)
+ int i, int n)
{
- bfd_byte buf;
+ uint32_t addr = ctx->addr;
+
+ g_assert(ctx->len == i);
+ g_assert(n <= ARRAY_SIZE(ctx->bytes));
+
while (++i <= n) {
- ctx->dis->read_memory_func(ctx->addr++, &buf, 1, ctx->dis);
- insn |= buf << (32 - i * 8);
+ ctx->dis->read_memory_func(addr++, &ctx->bytes[i - 1], 1, ctx->dis);
+ insn |= ctx->bytes[i - 1] << (32 - i * 8);
}
+ ctx->addr = addr;
+ ctx->len = n;
+
return insn;
}
static int32_t li(DisasContext *ctx, int sz)
{
- int32_t addr;
- bfd_byte buf[4];
- addr = ctx->addr;
+ uint32_t addr = ctx->addr;
+ uintptr_t len = ctx->len;
switch (sz) {
case 1:
+ g_assert(len + 1 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 1;
- ctx->dis->read_memory_func(addr, buf, 1, ctx->dis);
- return (int8_t)buf[0];
+ ctx->len += 1;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 1, ctx->dis);
+ return (int8_t)ctx->bytes[len];
case 2:
+ g_assert(len + 2 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 2;
- ctx->dis->read_memory_func(addr, buf, 2, ctx->dis);
- return ldsw_le_p(buf);
+ ctx->len += 2;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 2, ctx->dis);
+ return ldsw_le_p(ctx->bytes + len);
case 3:
+ g_assert(len + 3 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 3;
- ctx->dis->read_memory_func(addr, buf, 3, ctx->dis);
- return (int8_t)buf[2] << 16 | lduw_le_p(buf);
+ ctx->len += 3;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 3, ctx->dis);
+ return (int8_t)ctx->bytes[len + 2] << 16 | lduw_le_p(ctx->bytes + len);
case 0:
+ g_assert(len + 4 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 4;
- ctx->dis->read_memory_func(addr, buf, 4, ctx->dis);
- return ldl_le_p(buf);
+ ctx->len += 4;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 4, ctx->dis);
+ return ldl_le_p(ctx->bytes + len);
default:
g_assert_not_reached();
}
@@ -110,7 +126,7 @@ static const char psw[] = {
static void rx_index_addr(DisasContext *ctx, char out[8], int ld, int mi)
{
uint32_t addr = ctx->addr;
- uint8_t buf[2];
+ uintptr_t len = ctx->len;
uint16_t dsp;
switch (ld) {
@@ -119,14 +135,18 @@ static void rx_index_addr(DisasContext *ctx, char out[8],
int ld, int mi)
out[0] = '\0';
return;
case 1:
+ g_assert(len + 1 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 1;
- ctx->dis->read_memory_func(addr, buf, 1, ctx->dis);
- dsp = buf[0];
+ ctx->len += 1;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 1, ctx->dis);
+ dsp = ctx->bytes[len];
break;
case 2:
+ g_assert(len + 2 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 2;
- ctx->dis->read_memory_func(addr, buf, 2, ctx->dis);
- dsp = lduw_le_p(buf);
+ ctx->len += 2;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 2, ctx->dis);
+ dsp = lduw_le_p(ctx->bytes + len);
break;
default:
g_assert_not_reached();
@@ -1392,8 +1412,10 @@ int print_insn_rx(bfd_vma addr, disassemble_info *dis)
DisasContext ctx;
uint32_t insn;
int i;
+
ctx.dis = dis;
ctx.pc = ctx.addr = addr;
+ ctx.len = 0;
insn = decode_load(&ctx);
if (!decode(&ctx, insn)) {
--
2.20.1
- [PATCH v25 18/22] hw/rx: Honor -accel qtest, (continued)
- [PATCH v25 18/22] hw/rx: Honor -accel qtest, Yoshinori Sato, 2019/09/27
- [PATCH v25 19/22] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core, Yoshinori Sato, 2019/09/27
- [PATCH v25 22/22] qapi/machine.json: Add RX cpu., Yoshinori Sato, 2019/09/27
- [PATCH v25 07/22] target/rx: RX disassembler, Yoshinori Sato, 2019/09/27
- [PATCH v25 08/22] target/rx: Disassemble rx_index_addr into a string, Yoshinori Sato, 2019/09/27
- [PATCH v25 20/22] Add rx-softmmu, Yoshinori Sato, 2019/09/27
- [PATCH v25 16/22] hw/char: RX62N serial communication interface (SCI), Yoshinori Sato, 2019/09/27
- [PATCH v25 04/22] target/rx: TCG translation, Yoshinori Sato, 2019/09/27
- [PATCH v25 09/22] target/rx: Replace operand with prt_ldmi in disassembler, Yoshinori Sato, 2019/09/27
- [PATCH v25 11/22] target/rx: Emit all disassembly in one prt(), Yoshinori Sato, 2019/09/27
- [PATCH v25 12/22] target/rx: Collect all bytes during disassembly,
Yoshinori Sato <=
- [PATCH v25 21/22] BootLinuxConsoleTest: Test the RX-Virt machine, Yoshinori Sato, 2019/09/27
- [PATCH v25 14/22] hw/intc: RX62N interrupt controller (ICUa), Yoshinori Sato, 2019/09/27
- [PATCH v25 15/22] hw/timer: RX62N internal timer modules, Yoshinori Sato, 2019/09/27
- [PATCH v25 06/22] target/rx: CPU definition, Yoshinori Sato, 2019/09/27
- [PATCH v25 05/22] target/rx: TCG helper, Yoshinori Sato, 2019/09/27
- [PATCH v25 17/22] hw/rx: RX Target hardware definition, Yoshinori Sato, 2019/09/27
- Re: [PATCH v25 00/22] Add RX archtecture support, no-reply, 2019/09/27
- Re: [PATCH v25 00/22] Add RX archtecture support, no-reply, 2019/09/28
- Re: [PATCH v25 00/22] Add RX archtecture support, no-reply, 2019/09/28