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Re: [Qemu-devel] [PULL 24/24] q35: Revert to kernel irqchip
From: |
Greg Kurz |
Subject: |
Re: [Qemu-devel] [PULL 24/24] q35: Revert to kernel irqchip |
Date: |
Wed, 5 Jun 2019 11:14:43 +0200 |
On Mon, 3 Jun 2019 19:10:43 +0200
Paolo Bonzini <address@hidden> wrote:
> From: Alex Williamson <address@hidden>
>
> Commit b2fc91db8447 ("q35: set split kernel irqchip as default") changed
> the default for the pc-q35-4.0 machine type to use split irqchip, which
> turned out to have disasterous effects on vfio-pci INTx support. KVM
> resampling irqfds are registered for handling these interrupts, but
> these are non-functional in split irqchip mode. We can't simply test
> for split irqchip in QEMU as userspace handling of this interrupt is a
> significant performance regression versus KVM handling (GeForce GPUs
> assigned to Windows VMs are non-functional without forcing MSI mode or
> re-enabling kernel irqchip).
>
> The resolution is to revert the change in default irqchip mode in the
> pc-q35-4.1 machine and create a pc-q35-4.0.1 machine for the 4.0-stable
> branch. The qemu-q35-4.0 machine type should not be used in vfio-pci
> configurations for devices requiring legacy INTx support without
> explicitly modifying the VM configuration to use kernel irqchip.
>
> Link: https://bugs.launchpad.net/qemu/+bug/1826422
> Fixes: b2fc91db8447 ("q35: set split kernel irqchip as default")
> Signed-off-by: Alex Williamson <address@hidden>
> Reviewed-by: Peter Xu <address@hidden>
> Message-Id: <address@hidden>
> Signed-off-by: Paolo Bonzini <address@hidden>
> ---
> hw/core/machine.c | 3 +++
> hw/i386/pc.c | 3 +++
> hw/i386/pc_q35.c | 16 ++++++++++++++--
> include/hw/boards.h | 3 +++
> include/hw/i386/pc.h | 3 +++
> 5 files changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/hw/core/machine.c b/hw/core/machine.c
> index 16ba667..f1a0f45 100644
> --- a/hw/core/machine.c
> +++ b/hw/core/machine.c
> @@ -24,6 +24,9 @@
> #include "hw/pci/pci.h"
> #include "hw/mem/nvdimm.h"
>
> +GlobalProperty hw_compat_4_0_1[] = {};
> +const size_t hw_compat_4_0_1_len = G_N_ELEMENTS(hw_compat_4_0_1);
> +
> GlobalProperty hw_compat_4_0[] = {};
> const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 2632b73..edc240b 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -110,6 +110,9 @@ struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
> /* Physical Address of PVH entry point read from kernel ELF NOTE */
> static size_t pvh_start_addr;
>
> +GlobalProperty pc_compat_4_0_1[] = {};
> +const size_t pc_compat_4_0_1_len = G_N_ELEMENTS(pc_compat_4_0_1);
> +
> GlobalProperty pc_compat_4_0[] = {};
> const size_t pc_compat_4_0_len = G_N_ELEMENTS(pc_compat_4_0);
>
Do we hence need to add properties to both 4_0 and 4_0_1 ? Would it
make sense to introduce a PC_COMPAT_4_0_COMMON macro to avoid this
duplication ?
The question arose while reviewing this patch:
https://lists.gnu.org/archive/html/qemu-devel/2019-06/msg00409.html
> diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> index 37dd350..dcddc64 100644
> --- a/hw/i386/pc_q35.c
> +++ b/hw/i386/pc_q35.c
> @@ -357,7 +357,7 @@ static void pc_q35_machine_options(MachineClass *m)
> m->units_per_default_bus = 1;
> m->default_machine_opts = "firmware=bios-256k.bin";
> m->default_display = "std";
> - m->default_kernel_irqchip_split = true;
> + m->default_kernel_irqchip_split = false;
> m->no_floppy = 1;
> machine_class_allow_dynamic_sysbus_dev(m, TYPE_AMD_IOMMU_DEVICE);
> machine_class_allow_dynamic_sysbus_dev(m, TYPE_INTEL_IOMMU_DEVICE);
> @@ -374,10 +374,22 @@ static void pc_q35_4_1_machine_options(MachineClass *m)
> DEFINE_Q35_MACHINE(v4_1, "pc-q35-4.1", NULL,
> pc_q35_4_1_machine_options);
>
> -static void pc_q35_4_0_machine_options(MachineClass *m)
> +static void pc_q35_4_0_1_machine_options(MachineClass *m)
> {
> pc_q35_4_1_machine_options(m);
> m->alias = NULL;
> + compat_props_add(m->compat_props, hw_compat_4_0_1, hw_compat_4_0_1_len);
> + compat_props_add(m->compat_props, pc_compat_4_0_1, pc_compat_4_0_1_len);
> +}
> +
> +DEFINE_Q35_MACHINE(v4_0_1, "pc-q35-4.0.1", NULL,
> + pc_q35_4_0_1_machine_options);
> +
> +static void pc_q35_4_0_machine_options(MachineClass *m)
> +{
> + pc_q35_4_0_1_machine_options(m);
> + m->default_kernel_irqchip_split = true;
> + m->alias = NULL;
> compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
> compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
> }
> diff --git a/include/hw/boards.h b/include/hw/boards.h
> index 6f7916f..6ff02bf 100644
> --- a/include/hw/boards.h
> +++ b/include/hw/boards.h
> @@ -292,6 +292,9 @@ struct MachineState {
> } \
> type_init(machine_initfn##_register_types)
>
> +extern GlobalProperty hw_compat_4_0_1[];
> +extern const size_t hw_compat_4_0_1_len;
> +
> extern GlobalProperty hw_compat_4_0[];
> extern const size_t hw_compat_4_0_len;
>
> diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
> index 43df723..5d56362 100644
> --- a/include/hw/i386/pc.h
> +++ b/include/hw/i386/pc.h
> @@ -293,6 +293,9 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
> int e820_get_num_entries(void);
> bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
>
> +extern GlobalProperty pc_compat_4_0_1[];
> +extern const size_t pc_compat_4_0_1_len;
> +
> extern GlobalProperty pc_compat_4_0[];
> extern const size_t pc_compat_4_0_len;
>
- [Qemu-devel] [PULL 09/24] qgraph: allow extra_device_opts on contains nodes, (continued)
- [Qemu-devel] [PULL 09/24] qgraph: allow extra_device_opts on contains nodes, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 05/24] i386: Enable IA32_MISC_ENABLE MWAIT bit when exposing mwait/monitor, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 20/24] tests: convert ds1338-test to qtest, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 17/24] libqos: add ARM n800 machine object, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 14/24] imx25-pdk: create ds1338 for qtest inside the test, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 18/24] libqos: add ARM imx25-pdk machine object, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 15/24] libqos: split I2CAdapter initialization and allocation, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 21/24] libqos: i2c: move address into QI2CDevice, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 19/24] tests: convert OMAP i2c tests to qgraph, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 24/24] q35: Revert to kernel irqchip, Paolo Bonzini, 2019/06/03
- Re: [Qemu-devel] [PULL 24/24] q35: Revert to kernel irqchip,
Greg Kurz <=
- [Qemu-devel] [PULL 12/24] libqos: fix omap-i2c receiving more than 4 bytes, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 23/24] configure: remove tpm_passthrough & tpm_emulator, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 13/24] pca9552-test: do not rely on state across tests, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 16/24] libqos: convert I2C to qgraph, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 10/24] qgraph: fix qos_node_contains with options, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 06/24] edu: mmio: allow 64-bit access, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 11/24] libqos: move common i2c code to libqos, Paolo Bonzini, 2019/06/03
- [Qemu-devel] [PULL 22/24] ci: store Patchew configuration in the tree, Paolo Bonzini, 2019/06/03
- Re: [Qemu-devel] [PULL 00/24] Misc patches for 2019-06-03, Peter Maydell, 2019/06/03