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[Qemu-devel] [PULL 08/12] tcg/arm: Use ldr (literal) for goto_tb
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 08/12] tcg/arm: Use ldr (literal) for goto_tb |
Date: |
Mon, 19 Jun 2017 11:18:35 -0700 |
The new placement of the TB means that we can use one insn
to load the goto_tb destination directly from the TB.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/arm/tcg-target.inc.c | 23 ++++++++++++++++++-----
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index 42370e5..d1793ec 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -1669,14 +1669,27 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
}
break;
case INDEX_op_goto_tb:
- tcg_debug_assert(s->tb_jmp_insn_offset == 0);
{
/* Indirect jump method */
- intptr_t ptr = (intptr_t)(s->tb_jmp_target_addr + args[0]);
- tcg_out_movi32(s, COND_AL, TCG_REG_R0, ptr & ~0xfff);
- tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, TCG_REG_R0, ptr & 0xfff);
+ intptr_t ptr, dif, dil;
+ TCGReg base = TCG_REG_PC;
+
+ tcg_debug_assert(s->tb_jmp_insn_offset == 0);
+ ptr = (intptr_t)(s->tb_jmp_target_addr + args[0]);
+ dif = ptr - ((intptr_t)s->code_ptr + 8);
+ dil = sextract32(dif, 0, 12);
+ if (dif != dil) {
+ /* The TB is close, but outside the 12 bits addressable by
+ the load. We can extend this to 20 bits with a sub of a
+ shifted immediate from pc. In the vastly unlikely event
+ the code requires more than 1MB, we'll use 2 insns and
+ be no worse off. */
+ base = TCG_REG_R0;
+ tcg_out_movi32(s, COND_AL, base, ptr - dil);
+ }
+ tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, base, dil);
+ s->tb_jmp_reset_offset[args[0]] = tcg_current_code_size(s);
}
- s->tb_jmp_reset_offset[args[0]] = tcg_current_code_size(s);
break;
case INDEX_op_goto_ptr:
tcg_out_bx(s, COND_AL, args[0]);
--
2.9.4
- [Qemu-devel] [PULL 00/12] TCG queued patches, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 01/12] util: add cacheinfo, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 03/12] translate-all: consolidate tb init in tb_gen_code, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 04/12] tcg/aarch64: Use ADR in tcg_out_movi, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 05/12] tcg/arm: Use indirect branch for goto_tb, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 06/12] tcg/arm: Remove limit on code buffer size, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 02/12] tcg: allocate TB structs before the corresponding translated code, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 09/12] tcg: Increase hit rate of lookup_tb_ptr, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 07/12] tcg/arm: Try pc-relative addresses for movi, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 08/12] tcg/arm: Use ldr (literal) for goto_tb,
Richard Henderson <=
- [Qemu-devel] [PULL 10/12] target/alpha: Use tcg_gen_lookup_and_goto_ptr, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 11/12] target/s390x: Exit after changing PSW mask, Richard Henderson, 2017/06/19
- [Qemu-devel] [PULL 12/12] target/arm: Exit after clearing aarch64 interrupt mask, Richard Henderson, 2017/06/19
- Re: [Qemu-devel] [PULL 00/12] TCG queued patches, Peter Maydell, 2017/06/22