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[Qemu-devel] [PULL for v2.9 04/10] target-mips: replace break by goto cp
From: |
Yongbok Kim |
Subject: |
[Qemu-devel] [PULL for v2.9 04/10] target-mips: replace break by goto cp0_unimplemented |
Date: |
Mon, 20 Mar 2017 13:00:20 +0000 |
From: Philippe Mathieu-Daudé <address@hidden>
this fixes many warnings like:
target/mips/translate.c:6253:13: warning: Value stored to 'rn' is never read
rn = "invalid sel";
^ ~~~~~~~~~~~~~
Reported-by: Clang Static Analyzer
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Yongbok Kim <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
---
target/mips/translate.c | 88 ++++++++++++++++++++++++-------------------------
1 file changed, 44 insertions(+), 44 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 5c030a9..fc11e15 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -5458,19 +5458,19 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
case 1:
// gen_helper_mfc0_tracecontrol(arg); /* PDtrace support */
rn = "TraceControl";
-// break;
+ goto cp0_unimplemented;
case 2:
// gen_helper_mfc0_tracecontrol2(arg); /* PDtrace support */
rn = "TraceControl2";
-// break;
+ goto cp0_unimplemented;
case 3:
// gen_helper_mfc0_usertracedata(arg); /* PDtrace support */
rn = "UserTraceData";
-// break;
+ goto cp0_unimplemented;
case 4:
// gen_helper_mfc0_tracebpc(arg); /* PDtrace support */
rn = "TraceBPC";
-// break;
+ goto cp0_unimplemented;
default:
goto cp0_unimplemented;
}
@@ -5496,31 +5496,31 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
case 1:
// gen_helper_mfc0_performance1(arg);
rn = "Performance1";
-// break;
+ goto cp0_unimplemented;
case 2:
// gen_helper_mfc0_performance2(arg);
rn = "Performance2";
-// break;
+ goto cp0_unimplemented;
case 3:
// gen_helper_mfc0_performance3(arg);
rn = "Performance3";
-// break;
+ goto cp0_unimplemented;
case 4:
// gen_helper_mfc0_performance4(arg);
rn = "Performance4";
-// break;
+ goto cp0_unimplemented;
case 5:
// gen_helper_mfc0_performance5(arg);
rn = "Performance5";
-// break;
+ goto cp0_unimplemented;
case 6:
// gen_helper_mfc0_performance6(arg);
rn = "Performance6";
-// break;
+ goto cp0_unimplemented;
case 7:
// gen_helper_mfc0_performance7(arg);
rn = "Performance7";
-// break;
+ goto cp0_unimplemented;
default:
goto cp0_unimplemented;
}
@@ -6116,13 +6116,13 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
rn = "TraceControl";
/* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP;
-// break;
+ goto cp0_unimplemented;
case 2:
// gen_helper_mtc0_tracecontrol2(cpu_env, arg); /* PDtrace support
*/
rn = "TraceControl2";
/* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP;
-// break;
+ goto cp0_unimplemented;
case 3:
/* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP;
@@ -6130,13 +6130,13 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
rn = "UserTraceData";
/* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP;
-// break;
+ goto cp0_unimplemented;
case 4:
// gen_helper_mtc0_tracebpc(cpu_env, arg); /* PDtrace support */
/* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP;
rn = "TraceBPC";
-// break;
+ goto cp0_unimplemented;
default:
goto cp0_unimplemented;
}
@@ -6161,31 +6161,31 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
case 1:
// gen_helper_mtc0_performance1(arg);
rn = "Performance1";
-// break;
+ goto cp0_unimplemented;
case 2:
// gen_helper_mtc0_performance2(arg);
rn = "Performance2";
-// break;
+ goto cp0_unimplemented;
case 3:
// gen_helper_mtc0_performance3(arg);
rn = "Performance3";
-// break;
+ goto cp0_unimplemented;
case 4:
// gen_helper_mtc0_performance4(arg);
rn = "Performance4";
-// break;
+ goto cp0_unimplemented;
case 5:
// gen_helper_mtc0_performance5(arg);
rn = "Performance5";
-// break;
+ goto cp0_unimplemented;
case 6:
// gen_helper_mtc0_performance6(arg);
rn = "Performance6";
-// break;
+ goto cp0_unimplemented;
case 7:
// gen_helper_mtc0_performance7(arg);
rn = "Performance7";
-// break;
+ goto cp0_unimplemented;
default:
goto cp0_unimplemented;
}
@@ -6766,19 +6766,19 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
case 1:
// gen_helper_dmfc0_tracecontrol(arg, cpu_env); /* PDtrace support
*/
rn = "TraceControl";
-// break;
+ goto cp0_unimplemented;
case 2:
// gen_helper_dmfc0_tracecontrol2(arg, cpu_env); /* PDtrace support
*/
rn = "TraceControl2";
-// break;
+ goto cp0_unimplemented;
case 3:
// gen_helper_dmfc0_usertracedata(arg, cpu_env); /* PDtrace support
*/
rn = "UserTraceData";
-// break;
+ goto cp0_unimplemented;
case 4:
// gen_helper_dmfc0_tracebpc(arg, cpu_env); /* PDtrace support */
rn = "TraceBPC";
-// break;
+ goto cp0_unimplemented;
default:
goto cp0_unimplemented;
}
@@ -6803,31 +6803,31 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
case 1:
// gen_helper_dmfc0_performance1(arg);
rn = "Performance1";
-// break;
+ goto cp0_unimplemented;
case 2:
// gen_helper_dmfc0_performance2(arg);
rn = "Performance2";
-// break;
+ goto cp0_unimplemented;
case 3:
// gen_helper_dmfc0_performance3(arg);
rn = "Performance3";
-// break;
+ goto cp0_unimplemented;
case 4:
// gen_helper_dmfc0_performance4(arg);
rn = "Performance4";
-// break;
+ goto cp0_unimplemented;
case 5:
// gen_helper_dmfc0_performance5(arg);
rn = "Performance5";
-// break;
+ goto cp0_unimplemented;
case 6:
// gen_helper_dmfc0_performance6(arg);
rn = "Performance6";
-// break;
+ goto cp0_unimplemented;
case 7:
// gen_helper_dmfc0_performance7(arg);
rn = "Performance7";
-// break;
+ goto cp0_unimplemented;
default:
goto cp0_unimplemented;
}
@@ -7417,25 +7417,25 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
/* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP;
rn = "TraceControl";
-// break;
+ goto cp0_unimplemented;
case 2:
// gen_helper_mtc0_tracecontrol2(cpu_env, arg); /* PDtrace support
*/
/* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP;
rn = "TraceControl2";
-// break;
+ goto cp0_unimplemented;
case 3:
// gen_helper_mtc0_usertracedata(cpu_env, arg); /* PDtrace support
*/
/* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP;
rn = "UserTraceData";
-// break;
+ goto cp0_unimplemented;
case 4:
// gen_helper_mtc0_tracebpc(cpu_env, arg); /* PDtrace support */
/* Stop translation as we may have switched the execution mode */
ctx->bstate = BS_STOP;
rn = "TraceBPC";
-// break;
+ goto cp0_unimplemented;
default:
goto cp0_unimplemented;
}
@@ -7460,31 +7460,31 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
case 1:
// gen_helper_mtc0_performance1(cpu_env, arg);
rn = "Performance1";
-// break;
+ goto cp0_unimplemented;
case 2:
// gen_helper_mtc0_performance2(cpu_env, arg);
rn = "Performance2";
-// break;
+ goto cp0_unimplemented;
case 3:
// gen_helper_mtc0_performance3(cpu_env, arg);
rn = "Performance3";
-// break;
+ goto cp0_unimplemented;
case 4:
// gen_helper_mtc0_performance4(cpu_env, arg);
rn = "Performance4";
-// break;
+ goto cp0_unimplemented;
case 5:
// gen_helper_mtc0_performance5(cpu_env, arg);
rn = "Performance5";
-// break;
+ goto cp0_unimplemented;
case 6:
// gen_helper_mtc0_performance6(cpu_env, arg);
rn = "Performance6";
-// break;
+ goto cp0_unimplemented;
case 7:
// gen_helper_mtc0_performance7(cpu_env, arg);
rn = "Performance7";
-// break;
+ goto cp0_unimplemented;
default:
goto cp0_unimplemented;
}
--
2.7.4
- [Qemu-devel] [PULL for v2.9 00/10] target-mips queue, Yongbok Kim, 2017/03/20
- [Qemu-devel] [PULL for v2.9 07/10] dma: rc4030: limit interval timer reload value, Yongbok Kim, 2017/03/20
- [Qemu-devel] [PULL for v2.9 10/10] MAINTAINERS: update for MIPS devices, Yongbok Kim, 2017/03/20
- [Qemu-devel] [PULL for v2.9 02/10] target-mips: remove old & unuseful comments, Yongbok Kim, 2017/03/20
- [Qemu-devel] [PULL for v2.9 01/10] target-mips: fix compiler warnings (clang 5), Yongbok Kim, 2017/03/20
- [Qemu-devel] [PULL for v2.9 04/10] target-mips: replace break by goto cp0_unimplemented,
Yongbok Kim <=
- [Qemu-devel] [PULL for v2.9 08/10] dma/rc4030: translate memory accesses only when they occur, Yongbok Kim, 2017/03/20
- [Qemu-devel] [PULL for v2.9 03/10] target-mips: log bad coprocessor0 register accesses with LOG_UNIMP, Yongbok Kim, 2017/03/20
- [Qemu-devel] [PULL for v2.9 05/10] target-mips: replace few LOG_DISAS() with trace points, Yongbok Kim, 2017/03/20
- [Qemu-devel] [PULL for v2.9 09/10] dma/rc4030: fix a mixed declarations and code warning, Yongbok Kim, 2017/03/20
- [Qemu-devel] [PULL for v2.9 06/10] target/mips: fix delay slot detection in gen_msa_branch(), Yongbok Kim, 2017/03/20
- Re: [Qemu-devel] [PULL for v2.9 00/10] target-mips queue, Peter Maydell, 2017/03/20