Re: Problem in defining generic targets

[Paul D. Smith]

%% address@hidden writes:

  vs> Problem 1:

  vs> The problem is I want a generic rule to build targets say afile,
  vs> bfile or cfile dependent on a_FILES, b_FILES, c_FILES respectively
  vs> in example given below:

  vs> To_Build = a b c d

  vs> a_FILES = a1 a2 a3 a4
  vs> b_FILES = b1 b2 b3 b4
  vs> c_FILES = c1 c2 c3 c4

  vs> I tried the static pattern rule for prequisite and pathsub for
  vs> target but it doesn't work:

  vs> $(patsubst %,%file,$(To_build)):%file:$(%_FILE)

Yes.  The variables are evaluated first, before any patterns are
expanded.

Basically, you can't do this at all without re-invoking make.  You could
make it simpler using make's auto-re-exec feature; declare a rule that
builds a makefile part containing the target definitions you want based
on the contents of the To_Build variable, then include it.  This way
make will build the makefile, then re-invoke itself automatically.

In the next version of GNU make there will be a feature that will allow
this to be done more directly, without needing to re-invoke make.

  vs> Problem 2:
  vs> Also if I have,
  vs> temp = a
  vs> would $($(temp)_FILES) mean a_FILES

You mean, it would mean $(a_FILES).  Yes, certainly it would (this
should be easy for you to just test).

-- 
-------------------------------------------------------------------------------
 Paul D. Smith <address@hidden>          Find some GNU make tips at:
 http://www.gnu.org                      http://make.paulandlesley.org
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist