[Commit-gnuradio] r11467 - in gnuradio/branches/developers/jcorgan/u2fpga: sdr_lib top/u2_rev3

[jcorgan]

Author: jcorgan
Date: 2009-07-21 14:48:50 -0600 (Tue, 21 Jul 2009)
New Revision: 11467

Added:
   gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/ddc_cic_hb.v
Modified:
   gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/cic_decim.v
   gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/cic_interp.v
   gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/cordic.v
   gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/cordic_stage.v
   gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/ddc.v
   gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/dsp_core_rx.v
   gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/duc.v
   gnuradio/branches/developers/jcorgan/u2fpga/top/u2_rev3/Makefile
Log:
Refactored CIC+HB into separate DDC file.  No longer meets timing, but working 
at room temperature.


Property changes on: 
gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/cic_decim.v
___________________________________________________________________
Deleted: svn:executable
   - *


Property changes on: 
gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/cic_interp.v
___________________________________________________________________
Deleted: svn:executable
   - *


Property changes on: 
gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/cordic.v
___________________________________________________________________
Deleted: svn:executable
   - *


Property changes on: 
gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/cordic_stage.v
___________________________________________________________________
Deleted: svn:executable
   - *


Property changes on: gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/ddc.v
___________________________________________________________________
Deleted: svn:executable
   - *

Added: gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/ddc_cic_hb.v
===================================================================
--- gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/ddc_cic_hb.v            
                (rev 0)
+++ gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/ddc_cic_hb.v    
2009-07-21 20:48:50 UTC (rev 11467)
@@ -0,0 +1,94 @@
+module ddc_cic_hb
+  (// System bus
+   input         clk,
+   input         rst,
+   input         run,
+   output        strobe,
+
+   // Configuration parameters
+   input [31:0]  phase_inc,
+   input [7:0]   cic_decim_rate, // FIXME: These are compatible with existing
+   input         enable_hb1,     // firmware, but the enable logic should be
+   input         enable_hb2,     // in the specific decimator, not as ports
+   
+   // Sample data
+   input  [23:0] i_sample_in,
+   input  [23:0] q_sample_in,
+   output [15:0] i_sample_out,
+   output [15:0] q_sample_out,
+
+   output [31:0] debug
+   );
+
+   reg  [31:0] phase;
+   wire [23:0] i_cordic, q_cordic;
+   wire        strobe_cic;
+   wire [23:0] i_cic, q_cic;
+   wire [17:0] i_cic_scaled, q_cic_scaled;
+   reg                strobe_cic_d1;
+   wire        strobe_hb1;
+   wire [17:0] i_hb1, q_hb1;
+   wire [17:0] i_hb2, q_hb2;
+
+   // Create LO phase at configured frequency
+   always @(posedge clk)
+     if(rst|~run)
+       phase <= 0;
+     else
+       phase <= phase + phase_inc;
+
+   // Rotate (complex mix) signal by phase
+   cordic_z24 #(.bitwidth(24))
+     cordic(.clock(clk), .reset(rst), .enable(run),
+           .xi(i_sample_in),. yi(q_sample_in), .zi(phase[31:8]),
+           .xo(i_cordic),.yo(q_cordic),.zo() );
+
+   // Decimate using CIC filter
+   cic_strober 
cic_strober(.clock(clk),.reset(rst),.enable(run),.rate(cic_decim_rate),
+                          .strobe_fast(1),.strobe_slow(strobe_cic) );
+
+   cic_decim #(.bw(24))
+     decim_i (.clock(clk),.reset(rst),.enable(run),
+             .rate(cic_decim_rate),.strobe_in(1'b1),.strobe_out(strobe_cic),
+             .signal_in(i_cordic),.signal_out(i_cic));
+   
+   cic_decim #(.bw(24))
+     decim_q (.clock(clk),.reset(rst),.enable(run),
+             .rate(cic_decim_rate),.strobe_in(1'b1),.strobe_out(strobe_cic),
+             .signal_in(q_cordic),.signal_out(q_cic));
+
+   // Round CIC output to 18 bits
+   round_reg #(.bits_in(24),.bits_out(18)) round_icic 
(.clk(clk),.in(i_cic),.out(i_cic_scaled));
+   round_reg #(.bits_in(24),.bits_out(18)) round_qcic 
(.clk(clk),.in(q_cic),.out(q_cic_scaled));
+
+   // Delay CIC strobe by a clock
+   always @(posedge clk) strobe_cic_d1 <= strobe_cic;
+   
+   // First halfband filter
+   small_hb_dec #(.WIDTH(18)) small_hb_i
+     (.clk(clk),.rst(rst),.bypass(~enable_hb1),
+      
.stb_in(strobe_cic_d1),.data_in(i_cic_scaled),.stb_out(strobe_hb1),.data_out(i_hb1));
+   
+   small_hb_dec #(.WIDTH(18)) small_hb_q
+     (.clk(clk),.rst(rst),.bypass(~enable_hb1),
+      
.stb_in(strobe_cic_d1),.data_in(q_cic_scaled),.stb_out(),.data_out(q_hb1));
+   
+   // Second halfband filter
+   wire [8:0]  cpi_hb = enable_hb1 ? {cic_decim_rate,1'b0} : 
{1'b0,cic_decim_rate};
+
+   hb_dec #(.IWIDTH(18), .OWIDTH(18), .CWIDTH(18), .ACCWIDTH(24)) hb_i
+     (.clk(clk),.rst(rst),.bypass(~enable_hb2),.cpi(cpi_hb),
+      .stb_in(strobe_hb1),.data_in(i_hb1),.stb_out(strobe),.data_out(i_hb2));
+
+   hb_dec #(.IWIDTH(18), .OWIDTH(18), .CWIDTH(18), .ACCWIDTH(24)) hb_q
+     (.clk(clk),.rst(rst),.bypass(~enable_hb2),.cpi(cpi_hb),
+      .stb_in(strobe_hb1),.data_in(q_hb1),.stb_out(),.data_out(q_hb2));
+
+   // Round HB2 results for output
+   round #(.bits_in(18),.bits_out(16)) round_iout 
(.in(i_hb2),.out(i_sample_out));
+   round #(.bits_in(18),.bits_out(16)) round_qout 
(.in(q_hb2),.out(q_sample_out));
+
+   // Assign debug outputs
+   assign debug = {enable_hb1, enable_hb2, run, strobe, strobe_cic, 
strobe_cic_d1, strobe_hb1, strobe};
+
+endmodule // ddc_cic_hb

Modified: gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/dsp_core_rx.v
===================================================================
--- gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/dsp_core_rx.v   
2009-07-21 16:01:03 UTC (rev 11466)
+++ gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/dsp_core_rx.v   
2009-07-21 20:48:50 UTC (rev 11467)
@@ -1,5 +1,5 @@
-
 `define DSP_CORE_RX_BASE 160
+
 module dsp_core_rx
   (input clk, input rst,
    input set_stb, input [7:0] set_addr, input [31:0] set_data,
@@ -17,19 +17,10 @@
 
    wire [15:0] scale_i, scale_q;
    wire [13:0] adc_a_ofs, adc_b_ofs;
-   reg [13:0] adc_i, adc_q;
+   reg  [13:0] adc_i, adc_q;
    wire [31:0] phase_inc;
-   reg [31:0]  phase;
-
    wire [35:0] prod_i, prod_q;
-   wire [23:0] i_cordic, q_cordic;
-   wire [23:0] i_cic, q_cic;
-   wire [17:0] i_cic_scaled, q_cic_scaled;
-   wire [17:0] i_hb1, q_hb1;
-   wire [17:0] i_hb2, q_hb2;
    wire [15:0] i_out, q_out;
-
-   wire        strobe_cic, strobe_hb1, strobe_hb2;
    wire        enable_hb1, enable_hb2;
    wire [7:0]  cic_decim_rate;
    
@@ -88,76 +79,39 @@
        default: adc_q <= 0;
      endcase // case(muxctrl[3:2])
        
-   always @(posedge clk)
-     if(rst)
-       phase <= 0;
-     else if(~run)
-       phase <= 0;
-     else
-       phase <= phase + phase_inc;
-
+   // Scale I and Q as configured
    MULT18X18S mult_i
-     (.P(prod_i),    // 36-bit multiplier output
+     (.P(prod_i),                     // 36-bit multiplier output
       .A({{4{adc_i[13]}},adc_i} ),    // 18-bit multiplier input
-      .B({{2{scale_i[15]}},scale_i}),    // 18-bit multiplier input
-      .C(clk),    // Clock input
-      .CE(1),  // Clock enable input
-      .R(rst)     // Synchronous reset input
+      .B({{2{scale_i[15]}},scale_i}), // 18-bit multiplier input
+      .C(clk),                        // Clock input
+      .CE(1),                         // Clock enable input
+      .R(rst)                         // Synchronous reset input
       );
 
    MULT18X18S mult_q
-     (.P(prod_q),    // 36-bit multiplier output
+     (.P(prod_q),                     // 36-bit multiplier output
       .A({{4{adc_q[13]}},adc_q} ),    // 18-bit multiplier input
-      .B({{2{scale_q[15]}},scale_q}),    // 18-bit multiplier input
-      .C(clk),    // Clock input
-      .CE(1),  // Clock enable input
-      .R(rst)     // Synchronous reset input
+      .B({{2{scale_q[15]}},scale_q}), // 18-bit multiplier input
+      .C(clk),                        // Clock input
+      .CE(1),                         // Clock enable input
+      .R(rst)                         // Synchronous reset input
       ); 
 
-   
-   cordic_z24 #(.bitwidth(24))
-     cordic(.clock(clk), .reset(rst), .enable(run),
-           .xi(prod_i[23:0]),. yi(prod_q[23:0]), .zi(phase[31:8]),
-           .xo(i_cordic),.yo(q_cordic),.zo() );
+   // Downconvert in frequency and decimate sample rate
+   // Port compatible DDCs may be substituted here
+   ddc_cic_hb ddc(.clk(clk),.rst(rst),.run(run),
+                 .phase_inc(phase_inc),
+                 .cic_decim_rate(cic_decim_rate), // FIXME: this is compatible 
with
+                 .enable_hb1(enable_hb1),         // exiting firmware, but 
shouldn't be
+                 .enable_hb2(enable_hb2),         // in the general DDC port 
interface.
+                 .i_sample_in(prod_i[23:0]),
+                 .q_sample_in(prod_q[23:0]),
+                 .i_sample_out(i_out),
+                 .q_sample_out(q_out),
+                 .strobe(strobe),
+                 .debug(debug));
 
-   cic_strober 
cic_strober(.clock(clk),.reset(rst),.enable(run),.rate(cic_decim_rate),
-                          .strobe_fast(1),.strobe_slow(strobe_cic) );
-
-   cic_decim #(.bw(24))
-     decim_i (.clock(clk),.reset(rst),.enable(run),
-             .rate(cic_decim_rate),.strobe_in(1'b1),.strobe_out(strobe_cic),
-             .signal_in(i_cordic),.signal_out(i_cic));
-   
-   cic_decim #(.bw(24))
-     decim_q (.clock(clk),.reset(rst),.enable(run),
-             .rate(cic_decim_rate),.strobe_in(1'b1),.strobe_out(strobe_cic),
-             .signal_in(q_cordic),.signal_out(q_cic));
-
-   round_reg #(.bits_in(24),.bits_out(18)) round_icic 
(.clk(clk),.in(i_cic),.out(i_cic_scaled));
-   round_reg #(.bits_in(24),.bits_out(18)) round_qcic 
(.clk(clk),.in(q_cic),.out(q_cic_scaled));
-   reg                strobe_cic_d1;
-   always @(posedge clk) strobe_cic_d1 <= strobe_cic;
-   
-   small_hb_dec #(.WIDTH(18)) small_hb_i
-     (.clk(clk),.rst(rst),.bypass(~enable_hb1),
-      
.stb_in(strobe_cic_d1),.data_in(i_cic_scaled),.stb_out(strobe_hb1),.data_out(i_hb1));
-   
-   small_hb_dec #(.WIDTH(18)) small_hb_q
-     (.clk(clk),.rst(rst),.bypass(~enable_hb1),
-      
.stb_in(strobe_cic_d1),.data_in(q_cic_scaled),.stb_out(),.data_out(q_hb1));
-
-   wire [8:0]  cpi_hb = enable_hb1 ? {cic_decim_rate,1'b0} : 
{1'b0,cic_decim_rate};
-   hb_dec #(.IWIDTH(18), .OWIDTH(18), .CWIDTH(18), .ACCWIDTH(24)) hb_i
-     (.clk(clk),.rst(rst),.bypass(~enable_hb2),.cpi(cpi_hb),
-      
.stb_in(strobe_hb1),.data_in(i_hb1),.stb_out(strobe_hb2),.data_out(i_hb2));
-
-   hb_dec #(.IWIDTH(18), .OWIDTH(18), .CWIDTH(18), .ACCWIDTH(24)) hb_q
-     (.clk(clk),.rst(rst),.bypass(~enable_hb2),.cpi(cpi_hb),
-      .stb_in(strobe_hb1),.data_in(q_hb1),.stb_out(),.data_out(q_hb2));
-
-   round #(.bits_in(18),.bits_out(16)) round_iout (.in(i_hb2),.out(i_out));
-   round #(.bits_in(18),.bits_out(16)) round_qout (.in(q_hb2),.out(q_out));
-
    // Streaming GPIO
    //
    // io_rx[15] => I channel LSB if gpio_ena[0] high
@@ -173,7 +127,5 @@
      end
    
    assign      sample = sample_reg;
-   assign      strobe = strobe_hb2;
-   assign      debug = {enable_hb1, enable_hb2, run, strobe, strobe_cic, 
strobe_cic_d1, strobe_hb1, strobe_hb2};
    
 endmodule // dsp_core_rx


Property changes on: gnuradio/branches/developers/jcorgan/u2fpga/sdr_lib/duc.v
___________________________________________________________________
Deleted: svn:executable
   - *

Modified: gnuradio/branches/developers/jcorgan/u2fpga/top/u2_rev3/Makefile
===================================================================
--- gnuradio/branches/developers/jcorgan/u2fpga/top/u2_rev3/Makefile    
2009-07-21 16:01:03 UTC (rev 11466)
+++ gnuradio/branches/developers/jcorgan/u2fpga/top/u2_rev3/Makefile    
2009-07-21 20:48:50 UTC (rev 11467)
@@ -156,6 +156,7 @@
 sdr_lib/cordic.v \
 sdr_lib/cordic_z24.v \
 sdr_lib/cordic_stage.v \
+sdr_lib/ddc_cic_hb.v \
 sdr_lib/dsp_core_rx.v \
 sdr_lib/dsp_core_tx.v \
 sdr_lib/hb_dec.v \