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[Commit-gnuradio] r9922 - in usrp-hw/trunk: . anritsu_int
|
From: |
matt |
|
Subject: |
[Commit-gnuradio] r9922 - in usrp-hw/trunk: . anritsu_int |
|
Date: |
Mon, 3 Nov 2008 15:24:12 -0700 (MST) |
Author: matt
Date: 2008-11-03 15:24:11 -0700 (Mon, 03 Nov 2008)
New Revision: 9922
Added:
usrp-hw/trunk/anritsu_int/
usrp-hw/trunk/anritsu_int/anr_int.bom
usrp-hw/trunk/anritsu_int/anr_int.net
usrp-hw/trunk/anritsu_int/anr_int.pcb
usrp-hw/trunk/anritsu_int/anr_int.pdf
usrp-hw/trunk/anritsu_int/anr_int.prj
usrp-hw/trunk/anritsu_int/anr_int.ps
usrp-hw/trunk/anritsu_int/anr_int.sch
usrp-hw/trunk/anritsu_int/gafrc
usrp-hw/trunk/anritsu_int/netlist_cmd
Log:
first cut
Added: usrp-hw/trunk/anritsu_int/anr_int.bom
===================================================================
--- usrp-hw/trunk/anritsu_int/anr_int.bom (rev 0)
+++ usrp-hw/trunk/anritsu_int/anr_int.bom 2008-11-03 22:24:11 UTC (rev
9922)
@@ -0,0 +1,16 @@
+.START
+..device value footprint quantity refdes
+24LC025B unknown SO8 1 U1
+ADT1-1WT unknown MINICIRCUITS_CD542 2 T1 T2
+CAPACITOR .1uF 0603 1 C24
+CAPACITOR 10pF 0603 4 C22 C23 C25 C26
+HEADER10 unknown CONNECTOR 5 2 1 J17
+HEADER16 unknown CONNECTOR 8 2 3 J16 J24 J25
+HEADER20 unknown CONNECTOR 10 2 1 J15
+HEADER4 unknown CONNECTOR 4 1 1 J38
+PMC64 unknown PMC-REVERSE 1 J2
+RESISTOR 1K 0603 2 R6 R7
+RESISTOR 50 0603 6 R10 R11 R3 R4 R5 R9
+RESISTOR None 0603 1 R8
+SMA5 unknown SMA_VERT 2 J18 J19
+.END
Added: usrp-hw/trunk/anritsu_int/anr_int.net
===================================================================
--- usrp-hw/trunk/anritsu_int/anr_int.net (rev 0)
+++ usrp-hw/trunk/anritsu_int/anr_int.net 2008-11-03 22:24:11 UTC (rev
9922)
@@ -0,0 +1,53 @@
+unnamed_net7 R10-1 T2-4
+unnamed_net6 R11-1 T2-6
+unnamed_net5 R9-1 T2-1 J19-1
+unnamed_net4 R8-2 T2-5 T2-2 C24-1 R7-1 R6-2 T1-5 T1-2
+unnamed_net3 R5-1 T1-4
+unnamed_net2 R4-1 T1-6
+unnamed_net1 R3-1 T1-3 J18-1
+AUX_ADC_B1 J17-7 J2-61
+AUX_ADC_A1 J17-5 J2-59
+AUX_ADC_REF J17-3 J2-57
+AUX_DAC_C J17-8 J2-55
+AUX_DAC_B J17-6 J2-53
+AUX_DAC_A J17-4 J2-51
+AUX_DAC_D J17-2 J2-49
+SEN_RX J16-14 J2-35
+VINP_A C25-1 R10-2 J2-62
+VINN_A C26-1 R11-2 J2-60
+VREF R8-1 J2-56
+VINN_B C23-1 R5-2 J2-52
+VINP_B C22-1 R4-2 J2-50
+AVDD J17-1 R6-1 J2-45 J2-43 J2-46 J2-44
+AGND J17-9 J17-10 C26-2 C25-2 R9-2 T2-3 J19-5 J19-4 J19-3 J19-2 R7-2 C24-2
C23-2 C22-2 R3-2 T1-1 J18-5 J18-4 J18-3 J18-2 J2-63 J2-47 J2-41 J2-64 J2-58
J2-54 J2-48 J2-42
+io_rx_00 J24-15 J15-19 J2-36
+io_rx_01 J24-13 J15-18 J2-34
+io_rx_02 J24-11 J15-17 J2-32
+io_rx_03 J24-9 J15-16 J2-30
+io_rx_04 J24-7 J15-15 J2-28
+SDI J16-13 J2-33
+SDO J16-11 J2-31
+SCLK J16-12 J2-29
+RESET J16-15 J2-27
+io_rx_05 J24-5 J15-14 J2-26
+RS232_RXD J16-10 J2-25
+io_rx_06 J24-3 J15-13 J2-24
+RS232_TXD J16-9 J2-23
+io_rx_07 J24-1 J15-12 J2-22
+I2C_A0 J16-5 U1-1 J2-21
+io_rx_08 J25-15 J15-11 J2-20
+I2C_A1 J16-6 U1-2 J2-19
+io_rx_09 J25-13 J15-10 J2-18
+SDA J16-8 U1-5 J2-17
+io_rx_10 J25-11 J15-9 J2-16
+SCL J16-7 U1-6 J2-15
+io_rx_11 J25-9 J15-8 J2-14
+clk_n J38-3 J2-13
+io_rx_12 J25-7 J15-7 J2-12
+clk_p J38-2 J2-11
+io_rx_13 J25-5 J15-6 J2-10
+io_rx_14 J25-3 J15-5 J2-8
+DVDD J16-1 U1-8 U1-3 J2-9 J2-7
+io_rx_15 J25-1 J15-4 J2-6
+5V J16-3 J2-5 J2-3
+GND J38-4 J38-1 J25-6 J25-4 J25-14 J25-12 J25-10 J25-16 J25-8 J25-2 J24-6
J24-4 J24-14 J24-12 J24-10 J24-16 J24-8 J24-2 J16-16 J16-4 J16-2 J15-20 U1-4
U1-7 J2-37 J2-38 J2-2 J2-1
Added: usrp-hw/trunk/anritsu_int/anr_int.pcb
===================================================================
--- usrp-hw/trunk/anritsu_int/anr_int.pcb (rev 0)
+++ usrp-hw/trunk/anritsu_int/anr_int.pcb 2008-11-03 22:24:11 UTC (rev
9922)
@@ -0,0 +1,2312 @@
+# release: pcb 20070208
+# date: Mon Dec 24 13:37:34 2007
+# user: matt (Matt Ettus)
+# host: localhost.localdomain
+
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+ SymbolLine(0 20 5 25 8)
+)
+Symbol('o' 12)
+(
+ SymbolLine(0 25 0 35 8)
+ SymbolLine(0 25 5 20 8)
+ SymbolLine(5 20 15 20 8)
+ SymbolLine(15 20 20 25 8)
+ SymbolLine(20 25 20 35 8)
+ SymbolLine(15 40 20 35 8)
+ SymbolLine(5 40 15 40 8)
+ SymbolLine(0 35 5 40 8)
+)
+Symbol('p' 12)
+(
+ SymbolLine(5 25 5 55 8)
+ SymbolLine(0 20 5 25 8)
+ SymbolLine(5 25 10 20 8)
+ SymbolLine(10 20 20 20 8)
+ SymbolLine(20 20 25 25 8)
+ SymbolLine(25 25 25 35 8)
+ SymbolLine(20 40 25 35 8)
+ SymbolLine(10 40 20 40 8)
+ SymbolLine(5 35 10 40 8)
+)
+Symbol('q' 12)
+(
+ SymbolLine(20 25 20 55 8)
+ SymbolLine(15 20 20 25 8)
+ SymbolLine(5 20 15 20 8)
+ SymbolLine(0 25 5 20 8)
+ SymbolLine(0 25 0 35 8)
+ SymbolLine(0 35 5 40 8)
+ SymbolLine(5 40 15 40 8)
+ SymbolLine(15 40 20 35 8)
+)
+Symbol('r' 12)
+(
+ SymbolLine(5 25 5 40 8)
+ SymbolLine(5 25 10 20 8)
+ SymbolLine(10 20 20 20 8)
+ SymbolLine(0 20 5 25 8)
+)
+Symbol('s' 12)
+(
+ SymbolLine(5 40 20 40 8)
+ SymbolLine(20 40 25 35 8)
+ SymbolLine(20 30 25 35 8)
+ SymbolLine(5 30 20 30 8)
+ SymbolLine(0 25 5 30 8)
+ SymbolLine(0 25 5 20 8)
+ SymbolLine(5 20 20 20 8)
+ SymbolLine(20 20 25 25 8)
+ SymbolLine(0 35 5 40 8)
+)
+Symbol('t' 10)
+(
+ SymbolLine(5 0 5 35 8)
+ SymbolLine(5 35 10 40 8)
+ SymbolLine(0 15 10 15 8)
+)
+Symbol('u' 12)
+(
+ SymbolLine(0 20 0 35 8)
+ SymbolLine(0 35 5 40 8)
+ SymbolLine(5 40 15 40 8)
+ SymbolLine(15 40 20 35 8)
+ SymbolLine(20 20 20 35 8)
+)
+Symbol('v' 12)
+(
+ SymbolLine(0 20 0 30 8)
+ SymbolLine(0 30 10 40 8)
+ SymbolLine(10 40 20 30 8)
+ SymbolLine(20 20 20 30 8)
+)
+Symbol('w' 12)
+(
+ SymbolLine(0 20 0 35 8)
+ SymbolLine(0 35 5 40 8)
+ SymbolLine(5 40 10 40 8)
+ SymbolLine(10 40 15 35 8)
+ SymbolLine(15 20 15 35 8)
+ SymbolLine(15 35 20 40 8)
+ SymbolLine(20 40 25 40 8)
+ SymbolLine(25 40 30 35 8)
+ SymbolLine(30 20 30 35 8)
+)
+Symbol('x' 12)
+(
+ SymbolLine(0 20 20 40 8)
+ SymbolLine(0 40 20 20 8)
+)
+Symbol('y' 12)
+(
+ SymbolLine(0 20 0 35 8)
+ SymbolLine(0 35 5 40 8)
+ SymbolLine(20 20 20 50 8)
+ SymbolLine(15 55 20 50 8)
+ SymbolLine(5 55 15 55 8)
+ SymbolLine(0 50 5 55 8)
+ SymbolLine(5 40 15 40 8)
+ SymbolLine(15 40 20 35 8)
+)
+Symbol('z' 12)
+(
+ SymbolLine(0 20 20 20 8)
+ SymbolLine(0 40 20 20 8)
+ SymbolLine(0 40 20 40 8)
+)
+Symbol('{' 12)
+(
+ SymbolLine(5 5 10 0 8)
+ SymbolLine(5 5 5 15 8)
+ SymbolLine(0 20 5 15 8)
+ SymbolLine(0 20 5 25 8)
+ SymbolLine(5 25 5 35 8)
+ SymbolLine(5 35 10 40 8)
+)
+Symbol('|' 12)
+(
+ SymbolLine(0 0 0 40 8)
+)
+Symbol('}' 12)
+(
+ SymbolLine(0 0 5 5 8)
+ SymbolLine(5 5 5 15 8)
+ SymbolLine(5 15 10 20 8)
+ SymbolLine(5 25 10 20 8)
+ SymbolLine(5 25 5 35 8)
+ SymbolLine(0 40 5 35 8)
+)
+Symbol('~' 12)
+(
+ SymbolLine(0 25 5 20 8)
+ SymbolLine(5 20 10 20 8)
+ SymbolLine(10 20 15 25 8)
+ SymbolLine(15 25 20 25 8)
+ SymbolLine(20 25 25 20 8)
+)
+Via[15000 235000 13200 2000 11000 12800 "" "hole"]
+Via[173500 124000 4000 2000 0 2000 "" "thermal(1)"]
+Via[260000 15000 13200 2000 11000 12800 "" "hole"]
+Via[260000 235000 13200 2000 11000 12800 "" "hole"]
+Via[225500 85000 4000 2000 0 2000 "" ""]
+Via[209000 83500 4000 2000 0 2000 "" ""]
+Via[170000 85500 4000 2000 0 2000 "" ""]
+Via[180000 77000 4000 2000 0 2000 "" ""]
+Via[204500 174000 4000 2000 0 2000 "" ""]
+Via[202500 120500 4000 2000 0 2000 "" ""]
+Via[223000 113000 4000 2000 0 2000 "" "thermal(1)"]
+Via[196500 198000 4000 2000 0 2000 "" "thermal(1)"]
+Via[165500 79000 4000 2000 0 2000 "" "thermal(1)"]
+Via[106000 144000 4000 2000 0 2000 "" "auto"]
+Via[92500 153000 4000 2000 0 2000 "" ""]
+Via[87000 91500 4000 2000 0 2000 "" "thermal(1)"]
+Via[236000 145000 4000 2000 0 2000 "" "thermal(1)"]
+Via[173500 144500 4000 2000 0 2000 "" "thermal(1)"]
+Via[192000 156500 4000 2000 0 2000 "" ""]
+Via[55000 55000 13200 2000 11000 12800 "" "hole"]
+Via[123500 148000 4000 2000 0 2000 "" ""]
+Via[109500 148000 4000 2000 0 2000 "" ""]
+Via[85000 136000 4000 2000 0 2000 "" "thermal(1)"]
+Via[76000 198000 4000 2000 0 2000 "" ""]
+Via[76000 216000 4000 2000 0 2000 "" ""]
+Via[114000 155000 4000 2000 0 2000 "" ""]
+Via[146000 122000 4000 2000 0 2000 "" ""]
+Via[162000 133000 4000 2000 0 2000 "" ""]
+
+Element["" "0603" "R3" "50" 158000 210000 -14000 -2000 0 100 ""]
+(
+ Pad[2400 -900 2400 900 2400 3000 2400 "1" "1" "square"]
+ Pad[-2400 -900 -2400 900 2400 3000 2400 "2" "2" "square"]
+ ElementLine [-4200 2700 4200 2700 600]
+ ElementLine [-4200 -2700 -4200 2700 600]
+ ElementLine [-4200 -2700 4200 -2700 600]
+ ElementLine [4200 -2700 4200 2700 600]
+
+ )
+
+Element["" "MINICIRCUITS_CD542" "T2" "unknown" 229500 180500 -21000 -2000 0
100 ""]
+(
+ Pad[-10000 13200 -10000 16700 6500 3000 6500 "1" "1" "square,edge2"]
+ Pad[0 13200 0 16700 6500 3000 6500 "2" "2" "square,edge2"]
+ Pad[10000 13200 10000 16700 6500 3000 6500 "3" "3" "square,edge2"]
+ Pad[10000 -16700 10000 -13200 6500 3000 6500 "4" "4" "square"]
+ Pad[0 -16700 0 -13200 6500 3000 6500 "5" "5" "square"]
+ Pad[-10000 -16700 -10000 -13200 6500 3000 6500 "6" "6" "square"]
+ ElementLine [-14200 -21000 -14200 -2500 1000]
+ ElementLine [-14200 2500 -14200 21000 1000]
+ ElementLine [-14200 -21000 14200 -21000 1000]
+ ElementLine [14200 -21000 14200 21000 1000]
+ ElementLine [-14200 21000 14200 21000 1000]
+ ElementArc [-14200 0 2500 2500 90 180 1000]
+
+ )
+
+Element["" "0603" "C23" "10pF" 175500 154000 -4500 -5000 1 100 ""]
+(
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 2400 900 2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+
+ )
+
+Element["onsolder" "PMC-REVERSE" "J2" "unknown" 94993 95811 -18000 9000 0 100
"auto"]
+(
+ Pin[-6693 7189 7200 2000 7200 5800 "" "1" "hole,edge2"]
+ Pin[128740 7189 7200 2000 7200 5800 "" "2" "hole,edge2"]
+ Pad[0 9900 0 19000 2400 1000 3400 "" "1" "onsolder,edge2"]
+ Pad[122047 -4622 122047 4478 2400 1000 3400 "" "64" "onsolder"]
+ Pad[7874 9900 7874 19000 2400 1000 3400 "" "5" "onsolder,edge2"]
+ Pad[3937 9900 3937 19000 2400 1000 3400 "" "3" "onsolder,edge2"]
+ Pad[11811 9900 11811 19000 2400 1000 3400 "" "7" "onsolder,edge2"]
+ Pad[0 -4622 0 4478 2400 1000 3400 "" "2" "onsolder"]
+ Pad[15748 9900 15748 19000 2400 1000 3400 "" "9" "onsolder,edge2"]
+ Pad[7874 -4622 7874 4478 2400 1000 3400 "" "6" "onsolder"]
+ Pad[19685 9900 19685 19000 2400 1000 3400 "" "11" "onsolder,edge2"]
+ Pad[11811 -4622 11811 4478 2400 1000 3400 "" "8" "onsolder"]
+ Pad[23622 9900 23622 19000 2400 1000 3400 "" "13" "onsolder,edge2"]
+ Pad[15748 -4622 15748 4478 2400 1000 3400 "" "10" "onsolder"]
+ Pad[27559 9900 27559 19000 2400 1000 3400 "" "15" "onsolder,edge2"]
+ Pad[19685 -4622 19685 4478 2400 1000 3400 "" "12" "onsolder"]
+ Pad[31496 9900 31496 19000 2400 1000 3400 "" "17" "onsolder,edge2"]
+ Pad[23622 -4622 23622 4478 2400 1000 3400 "" "14" "onsolder"]
+ Pad[35433 9900 35433 19000 2400 1000 3400 "" "19" "onsolder,edge2"]
+ Pad[27559 -4622 27559 4478 2400 1000 3400 "" "16" "onsolder"]
+ Pad[39370 9900 39370 19000 2400 1000 3400 "" "21" "onsolder,edge2"]
+ Pad[31496 -4622 31496 4478 2400 1000 3400 "" "18" "onsolder"]
+ Pad[35433 -4622 35433 4478 2400 1000 3400 "" "20" "onsolder"]
+ Pad[39370 -4622 39370 4478 2400 1000 3400 "" "22" "onsolder"]
+ Pad[43307 -4622 43307 4478 2400 1000 3400 "" "24" "onsolder"]
+ Pad[47244 -4622 47244 4478 2400 1000 3400 "" "26" "onsolder"]
+ Pad[51181 -4622 51181 4478 2400 1000 3400 "" "28" "onsolder"]
+ Pad[55118 -4622 55118 4478 2400 1000 3400 "" "30" "onsolder"]
+ Pad[59055 -4622 59055 4478 2400 1000 3400 "" "32" "onsolder"]
+ Pad[62992 -4622 62992 4478 2400 1000 3400 "" "34" "onsolder"]
+ Pad[66929 -4622 66929 4478 2400 1000 3400 "" "36" "onsolder"]
+ Pad[70866 -4622 70866 4478 2400 1000 3400 "" "38" "onsolder"]
+ Pad[74803 -4622 74803 4478 2400 1000 3400 "" "40" "onsolder"]
+ Pad[78740 -4622 78740 4478 2400 1000 3400 "" "42" "onsolder"]
+ Pad[82677 -4622 82677 4478 2400 1000 3400 "" "44" "onsolder"]
+ Pad[86614 -4622 86614 4478 2400 1000 3400 "" "46" "onsolder"]
+ Pad[90551 -4622 90551 4478 2400 1000 3400 "" "48" "onsolder"]
+ Pad[98425 -4622 98425 4478 2400 1000 3400 "" "52" "onsolder"]
+ Pad[94488 -4622 94488 4478 2400 1000 3400 "" "50" "onsolder"]
+ Pad[102362 -4622 102362 4478 2400 1000 3400 "" "54" "onsolder"]
+ Pad[106299 -4622 106299 4478 2400 1000 3400 "" "56" "onsolder"]
+ Pad[110236 -4622 110236 4478 2400 1000 3400 "" "58" "onsolder"]
+ Pad[114173 -4622 114173 4478 2400 1000 3400 "" "60" "onsolder"]
+ Pad[3937 -4622 3937 4478 2400 1000 3400 "" "4" "onsolder"]
+ Pad[43307 9900 43307 19000 2400 1000 3400 "" "23" "onsolder,edge2"]
+ Pad[47244 9900 47244 19000 2400 1000 3400 "" "25" "onsolder,edge2"]
+ Pad[51181 9900 51181 19000 2400 1000 3400 "" "27" "onsolder,edge2"]
+ Pad[55118 9900 55118 19000 2400 1000 3400 "" "29" "onsolder,edge2"]
+ Pad[59055 9900 59055 19000 2400 1000 3400 "" "31" "onsolder,edge2"]
+ Pad[62992 9900 62992 19000 2400 1000 3400 "" "33" "onsolder,edge2"]
+ Pad[66929 9900 66929 19000 2400 1000 3400 "" "35" "onsolder,edge2"]
+ Pad[70866 9900 70866 19000 2400 1000 3400 "" "37" "onsolder,edge2"]
+ Pad[74803 9900 74803 19000 2400 1000 3400 "" "39" "onsolder,edge2"]
+ Pad[78740 9900 78740 19000 2400 1000 3400 "" "41" "onsolder,edge2"]
+ Pad[82677 9900 82677 19000 2400 1000 3400 "" "43" "onsolder,edge2"]
+ Pad[86614 9900 86614 19000 2400 1000 3400 "" "45" "onsolder,edge2"]
+ Pad[90551 9900 90551 19000 2400 1000 3400 "" "47" "onsolder,edge2"]
+ Pad[94488 9900 94488 19000 2400 1000 3400 "" "49" "onsolder,edge2"]
+ Pad[98425 9900 98425 19000 2400 1000 3400 "" "51" "onsolder,edge2"]
+ Pad[102362 9900 102362 19000 2400 1000 3400 "" "53" "onsolder,edge2"]
+ Pad[106299 9900 106299 19000 2400 1000 3400 "" "55" "onsolder,edge2"]
+ Pad[110236 9900 110236 19000 2400 1000 3400 "" "57" "onsolder,edge2"]
+ Pad[114173 9900 114173 19000 2400 1000 3400 "" "59" "onsolder,edge2"]
+ Pad[118110 9900 118110 19000 2400 1000 3400 "" "61" "onsolder,edge2"]
+ Pad[122047 9900 122047 19000 2400 1000 3400 "" "63" "onsolder,edge2"]
+ Pad[118110 -4622 118110 4478 2400 1000 3400 "" "62" "onsolder"]
+ ElementLine [134000 -9000 134000 24000 1000]
+ ElementLine [-11000 24000 134000 24000 1000]
+ ElementLine [-11000 -9000 134000 -9000 1000]
+ ElementLine [-11000 -9000 -11000 24000 1000]
+
+ )
+
+Element["" "0603" "R10" "50" 241000 152500 23500 4000 1 100 ""]
+(
+ Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+
+ )
+
+Element["" "CONNECTOR-10-2" "J15" "unknown" 77000 40500 -17200 -13200 0 100 ""]
+(
+ Pin[0 0 6000 3000 6600 4000 "1" "1" "square,edge2"]
+ Pin[0 -10000 6000 3000 6600 4000 "2" "2" "edge2"]
+ Pin[10000 0 6000 3000 6600 4000 "3" "3" "edge2"]
+ Pin[10000 -10000 6000 3000 6600 4000 "4" "4" "edge2"]
+ Pin[20000 0 6000 3000 6600 4000 "5" "5" "edge2"]
+ Pin[20000 -10000 6000 3000 6600 4000 "6" "6" "edge2"]
+ Pin[30000 0 6000 3000 6600 4000 "7" "7" "edge2"]
+ Pin[30000 -10000 6000 3000 6600 4000 "8" "8" "edge2"]
+ Pin[40000 0 6000 3000 6600 4000 "9" "9" "edge2"]
+ Pin[40000 -10000 6000 3000 6600 4000 "10" "10" "edge2"]
+ Pin[50000 0 6000 3000 6600 4000 "11" "11" "edge2"]
+ Pin[50000 -10000 6000 3000 6600 4000 "12" "12" "edge2"]
+ Pin[60000 0 6000 3000 6600 4000 "13" "13" "edge2"]
+ Pin[60000 -10000 6000 3000 6600 4000 "14" "14" "edge2"]
+ Pin[70000 0 6000 3000 6600 4000 "15" "15" "edge2"]
+ Pin[70000 -10000 6000 3000 6600 4000 "16" "16" "edge2"]
+ Pin[80000 0 6000 3000 6600 4000 "17" "17" "edge2"]
+ Pin[80000 -10000 6000 3000 6600 4000 "18" "18" "edge2"]
+ Pin[90000 0 6000 3000 6600 4000 "19" "19" "edge2"]
+ Pin[90000 -10000 6000 3000 6600 4000 "20" "20" "edge2,thermal(1)"]
+ ElementLine [-5000 -5000 5000 -5000 1000]
+ ElementLine [5000 -5000 5000 5000 1000]
+ ElementLine [-5000 -15000 -5000 5000 2000]
+ ElementLine [-5000 -15000 95000 -15000 2000]
+ ElementLine [95000 -15000 95000 5000 2000]
+ ElementLine [-5000 5000 95000 5000 2000]
+
+ )
+
+Element["" "CONNECTOR-5-2" "J17" "unknown" 183500 137500 49000 -12000 0 100 ""]
+(
+ Pin[0 0 6000 3000 6600 4000 "1" "1" "square,edge2"]
+ Pin[0 -10000 6000 3000 6600 4000 "2" "2" "edge2"]
+ Pin[10000 0 6000 3000 6600 4000 "3" "3" "edge2"]
+ Pin[10000 -10000 6000 3000 6600 4000 "4" "4" "edge2"]
+ Pin[20000 0 6000 3000 6600 4000 "5" "5" "edge2"]
+ Pin[20000 -10000 6000 3000 6600 4000 "6" "6" "edge2"]
+ Pin[30000 0 6000 3000 6600 4000 "7" "7" "edge2"]
+ Pin[30000 -10000 6000 3000 6600 4000 "8" "8" "edge2"]
+ Pin[40000 0 6000 3000 6600 4000 "9" "9" "edge2,thermal(1)"]
+ Pin[40000 -10000 6000 3000 6600 4000 "10" "10" "edge2,thermal(1)"]
+ ElementLine [-5000 -5000 5000 -5000 1000]
+ ElementLine [5000 -5000 5000 5000 1000]
+ ElementLine [-5000 -15000 -5000 5000 2000]
+ ElementLine [-5000 -15000 45000 -15000 2000]
+ ElementLine [45000 -15000 45000 5000 2000]
+ ElementLine [-5000 5000 45000 5000 2000]
+
+ )
+
+Element["" "SMA_VERT" "J18" "unknown" 160500 231500 -26000 -5000 0 100 ""]
+(
+ Pin[0 0 9000 3000 9000 6000 "1" "1" ""]
+ Pin[-10000 -10000 9000 3000 9000 6000 "2" "2" "thermal(1,6)"]
+ Pin[10000 -10000 9000 3000 9000 6000 "3" "3" "thermal(1,6)"]
+ Pin[-10000 10000 9000 3000 9000 6000 "4" "4" "thermal(1,6)"]
+ Pin[10000 10000 9000 3000 9000 6000 "5" "5" "thermal(1,6)"]
+ ElementLine [-16000 -16000 16000 -16000 1000]
+ ElementLine [-16000 -16000 -16000 16000 1000]
+ ElementLine [-16000 16000 16000 16000 1000]
+ ElementLine [16000 -16000 16000 16000 1000]
+
+ )
+
+Element["" "SMA_VERT" "J19" "unknown" 223500 231500 -17000 -22000 0 100 ""]
+(
+ Pin[0 0 9000 3000 9000 6000 "1" "1" ""]
+ Pin[-10000 -10000 9000 3000 9000 6000 "2" "2" "thermal(1,6)"]
+ Pin[10000 -10000 9000 3000 9000 6000 "3" "3" "thermal(1,6)"]
+ Pin[-10000 10000 9000 3000 9000 6000 "4" "4" "thermal(1,6)"]
+ Pin[10000 10000 9000 3000 9000 6000 "5" "5" "thermal(1,6)"]
+ ElementLine [-16000 -16000 16000 -16000 1000]
+ ElementLine [-16000 -16000 -16000 16000 1000]
+ ElementLine [-16000 16000 16000 16000 1000]
+ ElementLine [16000 -16000 16000 16000 1000]
+
+ )
+
+Element["" "0603" "R5" "50" 182500 154000 3500 5000 0 100 ""]
+(
+ Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+
+ )
+
+Element["" "0603" "R11" "50" 217500 152500 28000 4500 1 100 ""]
+(
+ Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+
+ )
+
+Element["" "0603" "C25" "10pF" 233500 152500 24500 4000 1 100 ""]
+(
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 2400 900 2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+
+ )
+
+Element["" "0603" "C26" "10pF" 225000 152500 27000 4000 1 100 ""]
+(
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 2400 900 2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+
+ )
+
+Element["" "0603" "R9" "50" 225500 210500 7000 -1500 0 100 ""]
+(
+ Pad[-2400 -900 -2400 900 2400 3000 2400 "1" "1" "square"]
+ Pad[2400 -900 2400 900 2400 3000 2400 "2" "2" "square"]
+ ElementLine [-4200 -2700 4200 -2700 600]
+ ElementLine [4200 -2700 4200 2700 600]
+ ElementLine [-4200 2700 4200 2700 600]
+ ElementLine [-4200 -2700 -4200 2700 600]
+
+ )
+
+Element["" "0603" "R8" "None" 200000 176500 -2500 -10500 0 100 ""]
+(
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 2400 900 2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+
+ )
+
+Element["" "0603" "C24" ".1uF" 193000 187000 -7000 6000 0 100 ""]
+(
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 2400 900 2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [-2700 -4200 2700 -4200 600]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+ ElementLine [2700 -4200 2700 4200 600]
+
+ )
+
+Element["" "0603" "R6" "1K" 192500 176500 -3500 -10000 0 100 ""]
+(
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 2400 900 2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+
+ )
+
+Element["" "0603" "R7" "1K" 200000 187000 500 6000 0 100 ""]
+(
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 2400 900 2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+
+ )
+
+Element["" "MINICIRCUITS_CD542" "T1" "unknown" 170000 183000 -21000 -3000 0
100 ""]
+(
+ Pad[-10000 13200 -10000 16700 6500 3000 6500 "1" "1" "square,edge2"]
+ Pad[0 13200 0 16700 6500 3000 6500 "2" "2" "square,edge2"]
+ Pad[10000 13200 10000 16700 6500 3000 6500 "3" "3" "square,edge2"]
+ Pad[10000 -16700 10000 -13200 6500 3000 6500 "4" "4" "square"]
+ Pad[0 -16700 0 -13200 6500 3000 6500 "5" "5" "square"]
+ Pad[-10000 -16700 -10000 -13200 6500 3000 6500 "6" "6" "square"]
+ ElementLine [-14200 -21000 -14200 -2500 1000]
+ ElementLine [-14200 2500 -14200 21000 1000]
+ ElementLine [-14200 -21000 14200 -21000 1000]
+ ElementLine [14200 -21000 14200 21000 1000]
+ ElementLine [-14200 21000 14200 21000 1000]
+ ElementArc [-14200 0 2500 2500 90 180 1000]
+
+ )
+
+Element["" "0603" "R4" "50" 159000 154000 -10500 1500 0 100 ""]
+(
+ Pad[-900 2400 900 2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+
+ )
+
+Element["" "0603" "C22" "10pF" 166000 154000 -1500 -5500 1 100 ""]
+(
+ Pad[-900 -2400 900 -2400 2400 3000 2400 "1" "1" "square"]
+ Pad[-900 2400 900 2400 2400 3000 2400 "2" "2" "square"]
+ ElementLine [2700 -4200 2700 4200 600]
+ ElementLine [-2700 4200 2700 4200 600]
+ ElementLine [-2700 -4200 -2700 4200 600]
+ ElementLine [-2700 -4200 2700 -4200 600]
+
+ )
+
+Element["" "CONNECTOR-8-2" "J25" "unknown" 11000 15000 19200 -2600 0 100 ""]
+(
+ Pin[0 0 6000 3000 6600 4000 "1" "1" "square"]
+ Pin[10000 0 6000 3000 6600 4000 "2" "2" "thermal(1)"]
+ Pin[0 10000 6000 3000 6600 4000 "3" "3" ""]
+ Pin[10000 10000 6000 3000 6600 4000 "4" "4" "thermal(1)"]
+ Pin[0 20000 6000 3000 6600 4000 "5" "5" ""]
+ Pin[10000 20000 6000 3000 6600 4000 "6" "6" "thermal(1)"]
+ Pin[0 30000 6000 3000 6600 4000 "7" "7" ""]
+ Pin[10000 30000 6000 3000 6600 4000 "8" "8" "thermal(1)"]
+ Pin[0 40000 6000 3000 6600 4000 "9" "9" ""]
+ Pin[10000 40000 6000 3000 6600 4000 "10" "10" "thermal(1)"]
+ Pin[0 50000 6000 3000 6600 4000 "11" "11" ""]
+ Pin[10000 50000 6000 3000 6600 4000 "12" "12" "thermal(1)"]
+ Pin[0 60000 6000 3000 6600 4000 "13" "13" ""]
+ Pin[10000 60000 6000 3000 6600 4000 "14" "14" "thermal(1)"]
+ Pin[0 70000 6000 3000 6600 4000 "15" "15" ""]
+ Pin[10000 70000 6000 3000 6600 4000 "16" "16" "thermal(1)"]
+ ElementLine [5000 -5000 5000 5000 1000]
+ ElementLine [-5000 5000 5000 5000 1000]
+ ElementLine [-5000 -5000 15000 -5000 2000]
+ ElementLine [15000 -5000 15000 75000 2000]
+ ElementLine [-5000 75000 15000 75000 2000]
+ ElementLine [-5000 -5000 -5000 75000 2000]
+
+ )
+
+Element["" "CONNECTOR-4-1" "J38" "unknown" 95000 129000 -16000 -3000 0 100 ""]
+(
+ Pin[0 0 6000 3000 6600 4000 "1" "1" "square,edge2,thermal(0X,1X)"]
+ Pin[10000 0 6000 3000 6600 4000 "2" "2" "edge2"]
+ Pin[20000 0 6000 3000 6600 4000 "3" "3" "edge2"]
+ Pin[30000 0 6000 3000 6600 4000 "4" "4" "edge2,thermal(0X,1X)"]
+ ElementLine [-5000 -5000 5000 -5000 1000]
+ ElementLine [5000 -5000 5000 5000 1000]
+ ElementLine [-5000 -5000 -5000 5000 2000]
+ ElementLine [-5000 -5000 35000 -5000 2000]
+ ElementLine [35000 -5000 35000 5000 2000]
+ ElementLine [-5000 5000 35000 5000 2000]
+
+ )
+
+Element["" "CONNECTOR-8-2" "J24" "unknown" 10500 132500 19800 -3100 0 100 ""]
+(
+ Pin[0 0 6000 3000 6600 4000 "1" "1" "square"]
+ Pin[10000 0 6000 3000 6600 4000 "2" "2" "thermal(1)"]
+ Pin[0 10000 6000 3000 6600 4000 "3" "3" ""]
+ Pin[10000 10000 6000 3000 6600 4000 "4" "4" "thermal(1)"]
+ Pin[0 20000 6000 3000 6600 4000 "5" "5" ""]
+ Pin[10000 20000 6000 3000 6600 4000 "6" "6" "thermal(1)"]
+ Pin[0 30000 6000 3000 6600 4000 "7" "7" ""]
+ Pin[10000 30000 6000 3000 6600 4000 "8" "8" "thermal(1)"]
+ Pin[0 40000 6000 3000 6600 4000 "9" "9" ""]
+ Pin[10000 40000 6000 3000 6600 4000 "10" "10" "thermal(1)"]
+ Pin[0 50000 6000 3000 6600 4000 "11" "11" ""]
+ Pin[10000 50000 6000 3000 6600 4000 "12" "12" "thermal(1)"]
+ Pin[0 60000 6000 3000 6600 4000 "13" "13" ""]
+ Pin[10000 60000 6000 3000 6600 4000 "14" "14" "thermal(1)"]
+ Pin[0 70000 6000 3000 6600 4000 "15" "15" ""]
+ Pin[10000 70000 6000 3000 6600 4000 "16" "16" "thermal(1)"]
+ ElementLine [5000 -5000 5000 5000 1000]
+ ElementLine [-5000 5000 5000 5000 1000]
+ ElementLine [-5000 -5000 15000 -5000 2000]
+ ElementLine [15000 -5000 15000 75000 2000]
+ ElementLine [-5000 75000 15000 75000 2000]
+ ElementLine [-5000 -5000 -5000 75000 2000]
+
+ )
+
+Element["" "CONNECTOR-8-2" "J16" "unknown" 70500 183500 -16000 -9000 0 100 ""]
+(
+ Pin[0 0 6000 3000 6600 4000 "1" "1" "square,edge2"]
+ Pin[0 -10000 6000 3000 6600 4000 "2" "2" "edge2,thermal(1,2X)"]
+ Pin[10000 0 6000 3000 6600 4000 "3" "3" "edge2"]
+ Pin[10000 -10000 6000 3000 6600 4000 "4" "4" "edge2,thermal(1)"]
+ Pin[20000 0 6000 3000 6600 4000 "5" "5" "edge2"]
+ Pin[20000 -10000 6000 3000 6600 4000 "6" "6" "edge2"]
+ Pin[30000 0 6000 3000 6600 4000 "7" "7" "edge2"]
+ Pin[30000 -10000 6000 3000 6600 4000 "8" "8" "edge2"]
+ Pin[40000 0 6000 3000 6600 4000 "9" "9" "edge2"]
+ Pin[40000 -10000 6000 3000 6600 4000 "10" "10" "edge2"]
+ Pin[50000 0 6000 3000 6600 4000 "11" "11" "edge2"]
+ Pin[50000 -10000 6000 3000 6600 4000 "12" "12" "edge2"]
+ Pin[60000 0 6000 3000 6600 4000 "13" "13" "edge2"]
+ Pin[60000 -10000 6000 3000 6600 4000 "14" "14" "edge2"]
+ Pin[70000 0 6000 3000 6600 4000 "15" "15" "edge2"]
+ Pin[70000 -10000 6000 3000 6600 4000 "16" "16" "edge2,thermal(1,2X)"]
+ ElementLine [-5000 -5000 5000 -5000 1000]
+ ElementLine [5000 -5000 5000 5000 1000]
+ ElementLine [-5000 -15000 -5000 5000 2000]
+ ElementLine [-5000 -15000 75000 -15000 2000]
+ ElementLine [75000 -15000 75000 5000 2000]
+ ElementLine [-5000 5000 75000 5000 2000]
+
+ )
+
+Element["" "SO8" "U1" "unknown" 88500 200000 18000 20000 0 100 ""]
+(
+ Pad[-1900 0 900 0 2000 3000 2000 "1" "1" ""]
+ Pad[-1900 5000 900 5000 2000 3000 2000 "2" "2" "square"]
+ Pad[-1900 10000 900 10000 2000 3000 2000 "3" "3" "square"]
+ Pad[-1900 15000 900 15000 2000 3000 2000 "4" "4" "square"]
+ Pad[18500 15000 21300 15000 2000 3000 2000 "5" "5" "square,edge2"]
+ Pad[18500 10000 21300 10000 2000 3000 2000 "6" "6" "square,edge2"]
+ Pad[18500 5000 21300 5000 2000 3000 2000 "7" "7" "square,edge2"]
+ Pad[18500 0 21300 0 2000 3000 2000 "8" "8" "square,edge2"]
+ ElementLine [-2900 -2500 -2900 17500 1000]
+ ElementLine [-2900 17500 22300 17500 1000]
+ ElementLine [22300 -2500 22300 17500 1000]
+ ElementLine [7200 -2500 22300 -2500 1000]
+ ElementLine [-2900 -2500 12200 -2500 1000]
+ ElementArc [9700 -2500 2500 2500 0 180 1000]
+
+ )
+Layer(1 "solder")
+(
+ Line[197355 100289 197500 100616 1000 2000 ""]
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+ Text[223500 64000 0 100 "SOLDER SIDE" "auto"]
+)
+Layer(2 "GND-sldr")
+(
+ Polygon("clearpoly")
+ (
+ [1500 1000] [168000 1000] [168000 145500] [1500 145500]
+ )
+ Polygon("clearpoly")
+ (
+ [155000 147500] [176500 147500] [176500 246500] [155000 246500]
+ )
+ Polygon("clearpoly")
+ (
+ [142000 198000] [4000 198000] [4000 245500] [142000 245500]
+ )
+ Polygon("clearpoly")
+ (
+ [146500 204000] [159000 204000] [159000 246500] [146500 246500]
+ )
+ Polygon("clearpoly")
+ (
+ [4000 145500] [153500 145500] [153500 202000] [4000 202000]
+ )
+ Polygon("clearpoly")
+ (
+ [169000 55000] [272500 55000] [272500 246500] [169000 246500]
+ )
+ Polygon("clearpoly")
+ (
+ [1000 141000] [153000 141000] [153000 152000] [1000 152000]
+ )
+ Polygon("clearpoly")
+ (
+ [3000 196000] [141000 196000] [141000 207000] [3000 207000]
+ )
+)
+Layer(3 "Vcc-sldr")
+(
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+)
+Layer(5 "GND-comp")
+(
+)
+Layer(6 "Vcc-comp")
+(
+)
+Layer(7 "GND")
+(
+)
+Layer(8 "internal")
+(
+)
+Layer(9 "silk")
+(
+ Text[223500 52000 0 100 "BACK SILK" "auto"]
+)
+Layer(10 "silk")
+(
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+ Text[165400 22600 1 100 "DGND" ""]
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+ Text[230000 145000 1 78 "AGND" ""]
+ Text[28500 56500 1 100 "DGND" ""]
+ Text[10700 107300 1 78 "io_rx[8]" ""]
+ Text[8600 225900 1 78 "io_rx[0]" ""]
+ Text[2100 4500 0 78 "io_rx[15]" ""]
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+ Text[145400 21600 1 78 "io_rx[3]" ""]
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+ Text[180000 145000 0 56 "3.3VA" ""]
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+ Text[78300 164400 1 100 "DGND" ""]
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+ Text[88000 196000 1 100 "A0" ""]
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+ Text[118000 165000 1 100 "SCLK" ""]
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+ Text[129000 200000 1 100 "SDI" ""]
+ Text[119000 201000 1 100 "SDO" ""]
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+ Text[69000 139000 0 100 "PWR" ""]
+ Text[121000 138000 0 100 "SPI" ""]
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+ Text[90000 139000 0 100 "I2C" ""]
+ Text[104000 121000 1 100 "CLKP" ""]
+ Text[113000 121000 1 100 "CLKN" ""]
+ Text[93000 120000 1 100 "GND" ""]
+ Text[177000 22000 0 122 "Rev 2.0" ""]
+ Text[177000 29000 0 122 "(c) 2008" ""]
+ Text[176000 36000 0 122 "Ettus Research LLC" ""]
+)
+NetList()
+(
+ Net("5V" "(unknown)")
+ (
+ Connect("J2-3")
+ Connect("J2-5")
+ Connect("J16-3")
+ )
+ Net("AGND" "(unknown)")
+ (
+ Connect("C22-2")
+ Connect("C23-2")
+ Connect("C24-2")
+ Connect("C25-2")
+ Connect("C26-2")
+ Connect("J2-41")
+ Connect("J2-42")
+ Connect("J2-47")
+ Connect("J2-48")
+ Connect("J2-54")
+ Connect("J2-58")
+ Connect("J2-63")
+ Connect("J2-64")
+ Connect("J17-9")
+ Connect("J17-10")
+ Connect("J18-2")
+ Connect("J18-3")
+ Connect("J18-4")
+ Connect("J18-5")
+ Connect("J19-2")
+ Connect("J19-3")
+ Connect("J19-4")
+ Connect("J19-5")
+ Connect("R3-2")
+ Connect("R7-2")
+ Connect("R9-2")
+ Connect("T1-1")
+ Connect("T2-3")
+ )
+ Net("AUX_ADC_A1" "(unknown)")
+ (
+ Connect("J2-59")
+ Connect("J17-5")
+ )
+ Net("AUX_ADC_B1" "(unknown)")
+ (
+ Connect("J2-61")
+ Connect("J17-7")
+ )
+ Net("AUX_ADC_REF" "(unknown)")
+ (
+ Connect("J2-57")
+ Connect("J17-3")
+ )
+ Net("AUX_DAC_A" "(unknown)")
+ (
+ Connect("J2-51")
+ Connect("J17-4")
+ )
+ Net("AUX_DAC_B" "(unknown)")
+ (
+ Connect("J2-53")
+ Connect("J17-6")
+ )
+ Net("AUX_DAC_C" "(unknown)")
+ (
+ Connect("J2-55")
+ Connect("J17-8")
+ )
+ Net("AUX_DAC_D" "(unknown)")
+ (
+ Connect("J2-49")
+ Connect("J17-2")
+ )
+ Net("AVDD" "(unknown)")
+ (
+ Connect("J2-43")
+ Connect("J2-44")
+ Connect("J2-45")
+ Connect("J2-46")
+ Connect("J17-1")
+ Connect("R6-1")
+ )
+ Net("clk_n" "(unknown)")
+ (
+ Connect("J2-13")
+ Connect("J38-3")
+ )
+ Net("clk_p" "(unknown)")
+ (
+ Connect("J2-11")
+ Connect("J38-2")
+ )
+ Net("DVDD" "(unknown)")
+ (
+ Connect("J2-7")
+ Connect("J2-9")
+ Connect("J16-1")
+ Connect("U1-3")
+ Connect("U1-8")
+ )
+ Net("GND" "(unknown)")
+ (
+ Connect("J2-1")
+ Connect("J2-2")
+ Connect("J2-37")
+ Connect("J2-38")
+ Connect("J15-20")
+ Connect("J16-2")
+ Connect("J16-4")
+ Connect("J16-16")
+ Connect("J24-2")
+ Connect("J24-4")
+ Connect("J24-6")
+ Connect("J24-8")
+ Connect("J24-10")
+ Connect("J24-12")
+ Connect("J24-14")
+ Connect("J24-16")
+ Connect("J25-2")
+ Connect("J25-4")
+ Connect("J25-6")
+ Connect("J25-8")
+ Connect("J25-10")
+ Connect("J25-12")
+ Connect("J25-14")
+ Connect("J25-16")
+ Connect("J38-1")
+ Connect("J38-4")
+ Connect("U1-4")
+ Connect("U1-7")
+ )
+ Net("I2C_A0" "(unknown)")
+ (
+ Connect("J2-21")
+ Connect("J16-5")
+ Connect("U1-1")
+ )
+ Net("I2C_A1" "(unknown)")
+ (
+ Connect("J2-19")
+ Connect("J16-6")
+ Connect("U1-2")
+ )
+ Net("io_rx_00" "(unknown)")
+ (
+ Connect("J2-36")
+ Connect("J15-19")
+ Connect("J24-15")
+ )
+ Net("io_rx_01" "(unknown)")
+ (
+ Connect("J2-34")
+ Connect("J15-18")
+ Connect("J24-13")
+ )
+ Net("io_rx_02" "(unknown)")
+ (
+ Connect("J2-32")
+ Connect("J15-17")
+ Connect("J24-11")
+ )
+ Net("io_rx_03" "(unknown)")
+ (
+ Connect("J2-30")
+ Connect("J15-16")
+ Connect("J24-9")
+ )
+ Net("io_rx_04" "(unknown)")
+ (
+ Connect("J2-28")
+ Connect("J15-15")
+ Connect("J24-7")
+ )
+ Net("io_rx_05" "(unknown)")
+ (
+ Connect("J2-26")
+ Connect("J15-14")
+ Connect("J24-5")
+ )
+ Net("io_rx_06" "(unknown)")
+ (
+ Connect("J2-24")
+ Connect("J15-13")
+ Connect("J24-3")
+ )
+ Net("io_rx_07" "(unknown)")
+ (
+ Connect("J2-22")
+ Connect("J15-12")
+ Connect("J24-1")
+ )
+ Net("io_rx_08" "(unknown)")
+ (
+ Connect("J2-20")
+ Connect("J15-11")
+ Connect("J25-15")
+ )
+ Net("io_rx_09" "(unknown)")
+ (
+ Connect("J2-18")
+ Connect("J15-10")
+ Connect("J25-13")
+ )
+ Net("io_rx_10" "(unknown)")
+ (
+ Connect("J2-16")
+ Connect("J15-9")
+ Connect("J25-11")
+ )
+ Net("io_rx_11" "(unknown)")
+ (
+ Connect("J2-14")
+ Connect("J15-8")
+ Connect("J25-9")
+ )
+ Net("io_rx_12" "(unknown)")
+ (
+ Connect("J2-12")
+ Connect("J15-7")
+ Connect("J25-7")
+ )
+ Net("io_rx_13" "(unknown)")
+ (
+ Connect("J2-10")
+ Connect("J15-6")
+ Connect("J25-5")
+ )
+ Net("io_rx_14" "(unknown)")
+ (
+ Connect("J2-8")
+ Connect("J15-5")
+ Connect("J25-3")
+ )
+ Net("io_rx_15" "(unknown)")
+ (
+ Connect("J2-6")
+ Connect("J15-4")
+ Connect("J25-1")
+ )
+ Net("RESET" "(unknown)")
+ (
+ Connect("J2-27")
+ Connect("J16-15")
+ )
+ Net("RS232_RXD" "(unknown)")
+ (
+ Connect("J2-25")
+ Connect("J16-10")
+ )
+ Net("RS232_TXD" "(unknown)")
+ (
+ Connect("J2-23")
+ Connect("J16-9")
+ )
+ Net("SCL" "(unknown)")
+ (
+ Connect("J2-15")
+ Connect("J16-7")
+ Connect("U1-6")
+ )
+ Net("SCLK" "(unknown)")
+ (
+ Connect("J2-29")
+ Connect("J16-12")
+ )
+ Net("SDA" "(unknown)")
+ (
+ Connect("J2-17")
+ Connect("J16-8")
+ Connect("U1-5")
+ )
+ Net("SDI" "(unknown)")
+ (
+ Connect("J2-33")
+ Connect("J16-13")
+ )
+ Net("SDO" "(unknown)")
+ (
+ Connect("J2-31")
+ Connect("J16-11")
+ )
+ Net("SEN_RX" "(unknown)")
+ (
+ Connect("J2-35")
+ Connect("J16-14")
+ )
+ Net("unnamed_net1" "(unknown)")
+ (
+ Connect("J18-1")
+ Connect("R3-1")
+ Connect("T1-3")
+ )
+ Net("unnamed_net2" "(unknown)")
+ (
+ Connect("R4-1")
+ Connect("T1-6")
+ )
+ Net("unnamed_net3" "(unknown)")
+ (
+ Connect("R5-1")
+ Connect("T1-4")
+ )
+ Net("unnamed_net4" "(unknown)")
+ (
+ Connect("C24-1")
+ Connect("R6-2")
+ Connect("R7-1")
+ Connect("R8-2")
+ Connect("T1-2")
+ Connect("T1-5")
+ Connect("T2-2")
+ Connect("T2-5")
+ )
+ Net("unnamed_net5" "(unknown)")
+ (
+ Connect("J19-1")
+ Connect("R9-1")
+ Connect("T2-1")
+ )
+ Net("unnamed_net6" "(unknown)")
+ (
+ Connect("R11-1")
+ Connect("T2-6")
+ )
+ Net("unnamed_net7" "(unknown)")
+ (
+ Connect("R10-1")
+ Connect("T2-4")
+ )
+ Net("VINN_A" "(unknown)")
+ (
+ Connect("C26-1")
+ Connect("J2-60")
+ Connect("R11-2")
+ )
+ Net("VINN_B" "(unknown)")
+ (
+ Connect("C23-1")
+ Connect("J2-52")
+ Connect("R5-2")
+ )
+ Net("VINP_A" "(unknown)")
+ (
+ Connect("C25-1")
+ Connect("J2-62")
+ Connect("R10-2")
+ )
+ Net("VINP_B" "(unknown)")
+ (
+ Connect("C22-1")
+ Connect("J2-50")
+ Connect("R4-2")
+ )
+ Net("VREF" "(unknown)")
+ (
+ Connect("J2-56")
+ Connect("R8-1")
+ )
+)
Added: usrp-hw/trunk/anritsu_int/anr_int.pdf
===================================================================
(Binary files differ)
Property changes on: usrp-hw/trunk/anritsu_int/anr_int.pdf
___________________________________________________________________
Name: svn:mime-type
+ application/octet-stream
Added: usrp-hw/trunk/anritsu_int/anr_int.prj
===================================================================
--- usrp-hw/trunk/anritsu_int/anr_int.prj (rev 0)
+++ usrp-hw/trunk/anritsu_int/anr_int.prj 2008-11-03 22:24:11 UTC (rev
9922)
@@ -0,0 +1,6 @@
+# List all schematics
+schematics rxmod.sch
+
+output-name rxmod
+
+elements-dir ./pkg/newlib
Added: usrp-hw/trunk/anritsu_int/anr_int.ps
===================================================================
--- usrp-hw/trunk/anritsu_int/anr_int.ps (rev 0)
+++ usrp-hw/trunk/anritsu_int/anr_int.ps 2008-11-03 22:24:11 UTC (rev
9922)
@@ -0,0 +1,3088 @@
+%!PS-Adobe-3.0
+%%Creator: gEDA gschem 20070902
+%%CreationDate: Mon Dec 24 13:38:22 2007
+%%Title: /home/matt/usrp-hw/basic-dboard/rxmod.sch
+%%Author: matt
+%%BoundingBox: 0 0 792 1224
+%%Orientation: Landscape
+%%Pages: 1
+%%Endcomments
+%%BeginProlog
+% Prolog for gEDA, define all the functions needed for rendering
+% schematics on Postscript devices
+
+
+% Draw a line from the second coordinate to the first
+% x2 y2 x1 y1 width line -
+/line {
+ setlinewidth
+ % pop off first element and moveto
+ moveto
+ % pop off remaining elements and draw a line segment
+ lineto
+ % draw it
+ stroke
+} bind def
+
+
+% Draw a dot
+% x y r dot -
+/dot {
+ 0 360 arc fill
+} bind def
+
+% Draw a dot-dashed line, a bunch of lined segments,
+% if the array element only has length two, draw a dot.
+% [ [x2 y2 x1 y1] [x4 y4 x3 y3] [x5 y5] ... ] width dashed -
+/width 0 def
+/dashed {
+ dup 2.0 div /width exch def
+ setlinewidth
+ % pop off each line segment and draw it as a dot or as a line
+ {
+ aload length 2 gt
+ { moveto lineto stroke}
+ { width dot } ifelse
+ } forall
+} bind def
+
+% Draw an arc segment
+% x y r ang1 ang2 width darc -
+/darc {
+ setlinewidth
+ arc stroke
+} bind def
+
+% Draw a series of arc segment bits, if the array element only has a single
+% element in it, draw a dot.
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+/x 0 def
+/y 0 def
+/dashedarc {
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+ setlinewidth
+ /r exch def
+ /y exch def
+ /x exch def
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+ {
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+ % extract start and stop angles
+ x y r % drop x y and r onto stack
+ % at this point we have: sa ea x y r
+ % we need x y r sa ea
+ % so..
+ 5 -2 roll
+ % and add it to the current path, and draw it
+ arc stroke
+ } {
+ % this element only had one angle in it, place a
+ % filled dot at the appropriate place
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+ % that is on the top of the stack
+ dup % angle angle
+ cos r mul x add % angle x
+ exch % x angle
+ sin r mul y add % x y
+ width % x y width/2
+ dot % draw the dot
+ } ifelse
+ } forall
+
+ % Now draw it
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+} bind def
+
+% Draw a box
+% width height x y linethickness box -
+/box {
+ setlinewidth
+ moveto
+ exch dup 0 rlineto % w h, h w w 0 -- Draw bottom line
+ exch 0 exch rlineto % h w, w h 0, w 0 h -- Draw right line
+ neg 0 rlineto % w, -w 0 -- Draw Top line
+ closepath % finish and draw it
+ stroke
+} bind def
+
+% Draw a filled box
+% width height x y fbox -
+/fbox {
+ moveto
+ exch dup 0 rlineto
+ exch 0 exch rlineto
+ neg 0 rlineto
+ closepath
+ fill
+} bind def
+
+% Font reincoding utilities
+
+% ISOLatin1Encoding, extended with remaining uncoded glyphs
+/ISOLatin1Extended [
+ /.notdef /Lslash /lslash /OE /oe /Scaron /scaron /Zcaron /zcaron
+ /Ydieresis /trademark /bullet /dagger /daggerdbl /ellipsis /emdash
+ /endash /fi /fl /florin /fraction /guilsinglleft /guilsinglright
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+ /quotesinglbase /quotesingle /.notdef /.notdef /.notdef /space
+ /exclam /quotedbl /numbersign /dollar /percent /ampersand
+ /quoteright /parenleft /parenright /asterisk /plus /comma /minus
+ /period /slash /zero /one /two /three /four /five /six /seven /eight
+ /nine /colon /semicolon /less /equal /greater /question /at /A /B /C
+ /D /E /F /G /H /I /J /K /L /M /N /O /P /Q /R /S /T /U /V /W /X /Y /Z
+ /bracketleft /backslash /bracketright /asciicircum /underscore
+ /quoteleft /a /b /c /d /e /f /g /h /i /j /k /l /m /n /o /p /q /r /s
+ /t /u /v /w /x /y /z /braceleft /bar /braceright /asciitilde
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+% Text handling functions, select the font and scale it, then we need
+% only to apply the appropriate transformations to get the text
+% justified into the right spots. The bad thing here is that we don't
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+
+% compute the height of one character and return lly and ury
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+/charheight {
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+ grestore % pop graphics state
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+% (string) stringheight lly ury
+/lly 0.0 def
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+
+/stringheight {
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+ /ury 0.0 def % initial value of heightmax
+ { % work through string
+ ( ) dup 0 4 -1 roll put % create one character string
+ charheight % measure it's height
+ dup ury gt { % if ury gt heightmax
+ /ury exch def % update with new value
+ } {
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+ } ifelse
+ dup lly lt { % if lly lt heightmin
+ /lly exch def % update with new value
+ } {
+ pop % else discard lly
+ } ifelse
+ } forall
+ lly ury % Return the results
+} bind def
+
+% calculate the string width taking into account the escapes.
+/mystrx 0.0 def
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+/mystresc false def
+
+/mystringwidth {
+ /mystrx 0.0 def
+ /mystry 0.0 def
+ /mystresc false def
+ { % work through string
+ % did we process the escape character last?
+ mystresc {
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+ % is it an _ = 95?
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+ pop % we don't need the character anymore
+ % toggle drawing overbars
+ 0.0 0.0 % make it like it never happened...
+ } {
+ % otherwise measure the character
+ (\\ ) dup 1 4 -1 roll put % count a \ and the character
+ stringwidth
+ } ifelse
+ % and reset the flag
+ /mystresc false def
+ } {
+ % last character was not escape
+ % is this escape
+ dup 92 eq {
+ % yes, escape character, set flag
+ /mystresc true def
+ pop % drop character
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+ } {
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+
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+
+% Show a string, with an overbar over it
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+ stroke
+ grestore
+ } if
+ show
+} bind def
+
+/overbarshow {
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+ % is it an _ = 95?
+ dup 95 eq {
+ pop % we don't need the character anymore
+ % toggle drawing overbars
+ /drawoverbar drawoverbar not def
+ } {
+ % otherwise render the character
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+ /escaped true def
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+
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+
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+
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+ % vertical justification
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+ % vertical center
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+ % center
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+ % vertical center
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Added: usrp-hw/trunk/anritsu_int/anr_int.sch
===================================================================
--- usrp-hw/trunk/anritsu_int/anr_int.sch (rev 0)
+++ usrp-hw/trunk/anritsu_int/anr_int.sch 2008-11-03 22:24:11 UTC (rev
9922)
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+}
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+}
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+}
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+{
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+}
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+}
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+{
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+}
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+{
+T 94700 32100 5 10 1 1 0 0 1
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+}
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+{
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+net=AGND:1
+}
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+{
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+}
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+{
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+}
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+{
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+}
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+{
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+}
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+}
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+{
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+}
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+{
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+}
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+{
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+}
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+{
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+}
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+{
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+}
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+{
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+footprint=SMA_VERT
+}
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+{
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+net=AGND:1
+}
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+C 88800 42000 1 180 0 T1-1T.sym
+{
+T 87700 40400 5 10 1 1 180 0 1
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+T 88800 42000 5 10 0 1 180 0 1
+footprint=MINICIRCUITS_CD542
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+device=ADT1-1WT
+}
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+{
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+T 92400 43500 5 10 1 1 0 0 1
+value=1000pF
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+}
+C 89200 39500 1 0 0 ltc64x0-xx.sym
+{
+T 92400 42400 5 10 1 1 0 6 1
+refdes=U2
+T 90800 41300 5 10 0 0 0 0 1
+device=LTC64X0-XX
+T 90800 41500 5 10 0 0 0 0 1
+footprint=QFN16
+}
+N 88400 40300 89300 40300 4
+{
+T 88600 40300 5 10 1 1 0 0 1
+netname=VCM
+}
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+{
+T 91900 38950 5 10 1 1 180 3 1
+net=AGND:1
+}
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+{
+T 82500 42200 5 10 1 1 0 0 1
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+value=18pF
+T 81900 41900 5 10 0 1 90 0 1
+footprint=0402
+}
+C 81900 42500 1 0 0 inductor-1.sym
+{
+T 82100 43000 5 10 0 0 0 0 1
+device=INDUCTOR
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+refdes=L1
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+T 81900 42500 5 10 0 0 0 0 1
+footprint=0603
+T 82400 42800 5 10 1 1 0 0 1
+value=180nH
+}
+C 85000 41900 1 0 0 capacitor-1.sym
+{
+T 85600 42200 5 10 1 1 0 0 1
+refdes=C10
+T 85600 41900 5 10 1 1 0 0 1
+value=156pF
+T 85000 41900 5 10 0 1 90 0 1
+footprint=0402
+}
+C 85000 42500 1 0 0 inductor-1.sym
+{
+T 85200 42800 5 10 1 1 0 0 1
+refdes=L2
+T 85200 43000 5 10 0 0 0 0 1
+device=INDUCTOR
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+footprint=0603
+T 85500 42800 5 10 1 1 0 0 1
+value=110nH
+}
+C 80600 40700 1 90 0 capacitor-1.sym
+{
+T 80500 41300 5 10 1 1 0 0 1
+refdes=C13
+T 80500 40900 5 10 1 1 0 0 1
+value=120pF
+T 80600 40700 5 10 0 1 180 0 1
+footprint=0402
+}
+C 83600 40700 1 90 0 capacitor-1.sym
+{
+T 83500 41300 5 10 1 1 0 0 1
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+}
+C 86600 40700 1 90 0 capacitor-1.sym
+{
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+value=100pF
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+}
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+N 87000 41900 87300 41900 4
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+N 88800 41900 89300 41900 4
+C 80100 42300 1 180 0 capacitor-1.sym
+{
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+refdes=C8
+T 79800 41900 5 10 1 1 0 0 1
+value=0.1uF
+T 80100 42300 5 10 0 1 270 0 1
+footprint=0402
+}
+N 78900 42100 79200 42100 4
+C 90400 43700 1 0 0 generic-power.sym
+{
+T 90600 43950 5 10 1 1 0 3 1
+net=3_3V:1
+}
+C 91800 42900 1 0 0 capacitor-1.sym
+{
+T 92400 43200 5 10 1 1 0 0 1
+refdes=C6
+T 92400 42900 5 10 1 1 0 0 1
+value=0.1uF
+T 91800 42900 5 10 0 1 90 0 1
+footprint=0402
+}
+C 93400 42900 1 270 1 generic-power.sym
+{
+T 93650 43100 5 10 1 1 270 3 1
+net=AGND:1
+}
+C 91800 44600 1 0 0 capacitor-1.sym
+{
+T 92400 44900 5 10 1 1 0 0 1
+refdes=C3
+T 92400 44600 5 10 1 1 0 0 1
+value=1000pF
+T 91800 44600 5 10 0 1 90 0 1
+footprint=0402
+}
+C 91800 44000 1 0 0 capacitor-1.sym
+{
+T 92400 44300 5 10 1 1 0 0 1
+refdes=C4
+T 92400 44000 5 10 1 1 0 0 1
+value=0.1uF
+T 91800 44000 5 10 0 1 90 0 1
+footprint=0402
+}
+C 91800 45800 1 0 0 capacitor-1.sym
+{
+T 92400 46100 5 10 1 1 0 0 1
+refdes=C1
+T 92400 45800 5 10 1 1 0 0 1
+value=1000pF
+T 91800 45800 5 10 0 1 90 0 1
+footprint=0402
+}
+C 91800 45200 1 0 0 capacitor-1.sym
+{
+T 92400 45500 5 10 1 1 0 0 1
+refdes=C2
+T 92400 45200 5 10 1 1 0 0 1
+value=0.1uF
+T 91800 45200 5 10 0 1 90 0 1
+footprint=0402
+}
+N 93400 43100 92700 43100 4
+N 93100 43100 93100 46000 4
+N 93100 46000 92700 46000 4
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+N 93100 44800 92700 44800 4
+N 93100 44200 92700 44200 4
+N 93100 43700 92700 43700 4
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+N 91400 43100 91800 43100 4
+N 90600 43400 91400 43400 4
+N 91000 42600 91000 43400 4
+N 90600 42600 90600 43700 4
+C 92900 41000 1 0 0 resistor-1.sym
+{
+T 93500 41400 5 10 1 1 180 0 1
+refdes=R4
+T 93500 40900 5 10 1 1 180 0 1
+value=?
+T 92900 41000 5 10 0 1 0 0 1
+footprint=0402
+}
+C 92900 41400 1 0 0 resistor-1.sym
+{
+T 93500 41800 5 10 1 1 180 0 1
+refdes=R3
+T 93500 41300 5 10 1 1 180 0 1
+value=?
+T 92900 41400 5 10 0 1 0 0 1
+footprint=0402
+}
+C 92900 41800 1 0 0 resistor-1.sym
+{
+T 93500 42200 5 10 1 1 180 0 1
+refdes=R1
+T 93500 41700 5 10 1 1 180 0 1
+value=?
+T 92900 41800 5 10 0 1 0 0 1
+footprint=0402
+}
+C 92900 40600 1 0 0 resistor-1.sym
+{
+T 93500 41000 5 10 1 1 180 0 1
+refdes=R5
+T 93500 40500 5 10 1 1 180 0 1
+value=?
+T 92900 40600 5 10 0 1 0 0 1
+footprint=0402
+}
+C 94400 40900 1 90 0 capacitor-1.sym
+{
+T 94300 41400 5 10 1 1 0 0 1
+refdes=C11
+T 94300 41100 5 10 1 1 0 0 1
+value=?
+T 94400 40900 5 10 0 1 180 0 1
+footprint=0402
+}
+N 92700 41900 92900 41900 4
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+N 93900 41500 93900 41900 4
+N 94200 40700 94200 40900 4
+N 94200 41900 94200 41800 4
+C 94800 40600 1 0 0 resistor-1.sym
+{
+T 95400 41000 5 10 1 1 180 0 1
+refdes=R9
+T 95400 40500 5 10 1 1 180 0 1
+value=?
+T 94800 40600 5 10 0 1 0 0 1
+footprint=0402
+}
+C 94800 41800 1 0 0 resistor-1.sym
+{
+T 95400 42200 5 10 1 1 180 0 1
+refdes=R2
+T 95400 41700 5 10 1 1 180 0 1
+value=?
+T 94800 41800 5 10 0 1 0 0 1
+footprint=0402
+}
+N 93800 41900 94800 41900 4
+C 94800 40900 1 90 0 capacitor-1.sym
+{
+T 94700 41400 5 10 1 1 0 0 1
+refdes=C12
+T 94700 41100 5 10 1 1 0 0 1
+value=?
+T 94800 40900 5 10 0 1 180 0 1
+footprint=0402
+}
+N 94600 41800 94600 41900 4
+N 94600 40700 94600 40900 4
+N 95700 40700 96700 40700 4
+{
+T 95900 40700 5 10 1 1 0 0 1
+netname=VINN_A
+}
+C 94800 42100 1 90 0 capacitor-1.sym
+{
+T 94700 42600 5 10 1 1 0 0 1
+refdes=C7
+T 94700 42300 5 10 1 1 0 0 1
+value=?
+T 94800 42100 5 10 0 1 180 0 1
+footprint=0402
+}
+C 94800 39600 1 90 0 capacitor-1.sym
+{
+T 94700 40100 5 10 1 1 0 0 1
+refdes=C16
+T 94700 39800 5 10 1 1 0 0 1
+value=?
+T 94800 39600 5 10 0 1 180 0 1
+footprint=0402
+}
+C 94400 39400 1 180 1 generic-power.sym
+{
+T 94600 39150 5 10 1 1 180 3 1
+net=AGND:1
+}
+C 94800 43200 1 0 1 generic-power.sym
+{
+T 94600 43450 5 10 1 1 0 3 1
+net=AGND:1
+}
+N 94600 43000 94600 43200 4
+N 94600 39400 94600 39600 4
+N 94600 40500 94600 40700 4
+N 94600 41900 94600 42100 4
+C 80100 40700 1 90 0 inductor-1.sym
+{
+T 79600 40900 5 10 0 0 90 0 1
+device=INDUCTOR
+T 79800 40900 5 10 1 1 90 0 1
+refdes=L5
+T 79400 40900 5 10 0 0 90 0 1
+symversion=0.1
+T 80100 40700 5 10 0 0 90 0 1
+footprint=0402
+T 79800 41200 5 10 1 1 90 0 1
+value=None
+}
+N 80000 40700 80000 40500 4
+N 80000 41600 80000 41700 4
+N 80000 41700 80400 41700 4
+C 83100 40700 1 90 0 inductor-1.sym
+{
+T 82600 40900 5 10 0 0 90 0 1
+device=INDUCTOR
+T 82800 40900 5 10 1 1 90 0 1
+refdes=L6
+T 82400 40900 5 10 0 0 90 0 1
+symversion=0.1
+T 83100 40700 5 10 0 0 90 0 1
+footprint=0402
+T 82800 41200 5 10 1 1 90 0 1
+value=None
+}
+N 83000 41700 83400 41700 4
+N 83000 41600 83000 41700 4
+N 83000 40700 83000 40500 4
+C 86100 40700 1 90 0 inductor-1.sym
+{
+T 85600 40900 5 10 0 0 90 0 1
+device=INDUCTOR
+T 85800 40900 5 10 1 1 90 0 1
+refdes=L7
+T 85400 40900 5 10 0 0 90 0 1
+symversion=0.1
+T 86100 40700 5 10 0 0 90 0 1
+footprint=0402
+T 85800 41200 5 10 1 1 90 0 1
+value=None
+}
+N 86000 41700 86400 41700 4
+N 86000 41600 86000 41700 4
+N 86000 40700 86000 40500 4
+C 80800 42000 1 0 0 inductor-1.sym
+{
+T 81000 42500 5 10 0 0 0 0 1
+device=INDUCTOR
+T 81000 42300 5 10 1 1 0 0 1
+refdes=L3
+T 81000 42700 5 10 0 0 0 0 1
+symversion=0.1
+T 80800 42000 5 10 0 0 0 0 1
+footprint=0402
+T 81300 42300 5 10 1 1 0 0 1
+value=0
+}
+N 81700 42100 81900 42100 4
+C 83900 42000 1 0 0 inductor-1.sym
+{
+T 84100 42500 5 10 0 0 0 0 1
+device=INDUCTOR
+T 84100 42300 5 10 1 1 0 0 1
+refdes=L4
+T 84100 42700 5 10 0 0 0 0 1
+symversion=0.1
+T 83900 42000 5 10 0 0 0 0 1
+footprint=0402
+T 84400 42300 5 10 1 1 0 0 1
+value=0
+}
+N 84800 42100 85000 42100 4
+N 95700 41900 96700 41900 4
+{
+T 95900 41900 5 10 1 1 0 0 1
+netname=VINP_A
+}
+C 97000 40500 1 0 0 header4-1.sym
+{
+T 97100 40950 5 10 0 0 0 0 1
+device=HEADER4
+T 97400 42200 5 10 1 1 0 0 1
+refdes=J1
+T 97000 40500 5 10 0 0 0 0 1
+footprint=SIP4N
+}
+N 96700 41900 96700 41500 4
+N 96700 41500 97000 41500 4
+N 97000 41100 96700 41100 4
+N 96700 41100 96700 40700 4
+N 97000 41900 96900 41900 4
+N 96900 41900 96900 42300 4
+C 97100 42300 1 0 1 generic-power.sym
+{
+T 96900 42550 5 10 1 1 0 3 1
+net=AGND:1
+}
+N 97000 40700 96900 40700 4
+N 96900 40700 96900 40300 4
+C 97100 40300 1 180 0 generic-power.sym
+{
+T 96900 40050 5 10 1 1 180 3 1
+net=AGND:1
+}
Added: usrp-hw/trunk/anritsu_int/gafrc
===================================================================
--- usrp-hw/trunk/anritsu_int/gafrc (rev 0)
+++ usrp-hw/trunk/anritsu_int/gafrc 2008-11-03 22:24:11 UTC (rev 9922)
@@ -0,0 +1,3 @@
+(component-library "../sym")
+(component-library "../sym/generated")
+
Added: usrp-hw/trunk/anritsu_int/netlist_cmd
===================================================================
--- usrp-hw/trunk/anritsu_int/netlist_cmd (rev 0)
+++ usrp-hw/trunk/anritsu_int/netlist_cmd 2008-11-03 22:24:11 UTC (rev
9922)
@@ -0,0 +1,3 @@
+gsch2pcb anr_int.prj
+gnetlist -g partslist3 -o anr_int.bom anr_int.sch
+
Property changes on: usrp-hw/trunk/anritsu_int/netlist_cmd
___________________________________________________________________
Name: svn:executable
+ *
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- [Commit-gnuradio] r9922 - in usrp-hw/trunk: . anritsu_int,
matt <=