[Commit-gnuradio] r9909 - gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src

[eb]

Author: eb
Date: 2008-11-02 17:28:28 -0700 (Sun, 02 Nov 2008)
New Revision: 9909

Added:
   gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_base.cc
   gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_base.h
Modified:
   gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/Makefile.am
   gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.cc
   gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.h
Log:
extracted usrp_base from usrp_source_base

Modified: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/Makefile.am
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/Makefile.am   
2008-11-02 23:28:31 UTC (rev 9908)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/Makefile.am   
2008-11-03 00:28:28 UTC (rev 9909)
@@ -59,11 +59,12 @@
                 $(WITH_SWIG_INCLUDES)
 
 grinclude_HEADERS =                    \
+       usrp_base.h                     \
        usrp_sink_base.h                \
        usrp_sink_c.h                   \
        usrp_sink_s.h                   \
        usrp_source_base.h              \
-       usrp_source_c.h         \
+       usrp_source_c.h                 \
        usrp_source_s.h         
 
 swiginclude_HEADERS =                  \
@@ -74,13 +75,14 @@
 
 
 _usrp_swig_la_SOURCES =                \
-       usrp_swig.cc                    \
+       usrp_base.cc                    \
        usrp_sink_base.cc               \
        usrp_sink_c.cc                  \
        usrp_sink_s.cc                  \
        usrp_source_base.cc             \
        usrp_source_c.cc                \
-       usrp_source_s.cc                
+       usrp_source_s.cc                \
+       usrp_swig.cc                    
 
 
 _usrp_swig_la_LIBADD =                         \

Added: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_base.cc
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_base.cc          
                (rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_base.cc  
2008-11-03 00:28:28 UTC (rev 9909)
@@ -0,0 +1,260 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2008 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include <config.h>
+#endif
+#include <usrp_base.h>
+#include <usrp_basic.h>
+
+usrp_base::~usrp_base()
+{
+  // NOP
+}
+
+long
+usrp_base::fpga_master_clock_freq() const
+{
+  return d_usrp_basic->fpga_master_clock_freq();
+}
+
+void
+usrp_base::set_verbose (bool verbose)
+{  
+  d_usrp_basic->set_verbose (verbose);
+}
+
+bool
+usrp_base::write_eeprom (int i2c_addr, int eeprom_offset, const std::string 
buf)
+{
+  return d_usrp_basic->write_eeprom (i2c_addr, eeprom_offset, buf);
+}
+
+std::string
+usrp_base::read_eeprom (int i2c_addr, int eeprom_offset, int len)
+{
+  return d_usrp_basic->read_eeprom (i2c_addr, eeprom_offset, len);
+}
+
+bool
+usrp_base::write_i2c (int i2c_addr, const std::string buf)
+{
+  return d_usrp_basic->write_i2c (i2c_addr, buf);
+}
+
+std::string
+usrp_base::read_i2c (int i2c_addr, int len)
+{
+  return d_usrp_basic->read_i2c (i2c_addr, len);
+}
+
+bool
+usrp_base::set_adc_offset (int which, int offset)
+{
+  return d_usrp_basic->set_adc_offset (which, offset);
+}
+
+bool
+usrp_base::set_dac_offset (int which, int offset, int offset_pin)
+{
+  return d_usrp_basic->set_dac_offset (which, offset, offset_pin);
+}
+
+bool
+usrp_base::set_adc_buffer_bypass (int which, bool bypass)
+{
+  return d_usrp_basic->set_adc_buffer_bypass (which, bypass);
+}
+
+bool
+usrp_base::set_dc_offset_cl_enable(int bits, int mask)
+{
+  return d_usrp_basic->set_dc_offset_cl_enable(bits, mask);
+}
+
+std::string
+usrp_base::serial_number()
+{
+  return d_usrp_basic->serial_number();
+}
+
+int
+usrp_base::daughterboard_id (int which) const
+{
+  return d_usrp_basic->daughterboard_id (which);
+}
+
+bool
+usrp_base::write_atr_tx_delay(int value)
+{
+  return d_usrp_basic->write_atr_tx_delay(value);
+}
+
+bool
+usrp_base::write_atr_rx_delay(int value)
+{
+  return d_usrp_basic->write_atr_rx_delay(value);
+}
+
+bool
+usrp_base::set_pga (int which, double gain)
+{
+  return d_usrp_basic->set_pga (which, gain);
+}
+
+double
+usrp_base::pga (int which) const
+{
+  return d_usrp_basic->pga (which);
+}
+
+double
+usrp_base::pga_min () const
+{
+  return d_usrp_basic->pga_min ();
+}
+
+double
+usrp_base::pga_max () const
+{
+  return d_usrp_basic->pga_max ();
+}
+
+double
+usrp_base::pga_db_per_step () const
+{
+  return d_usrp_basic->pga_db_per_step ();
+}
+
+bool
+usrp_base::_write_oe (int which_dboard, int value, int mask)
+{
+  return d_usrp_basic->_write_oe (which_dboard, value, mask);
+}
+
+bool
+usrp_base::write_io (int which_dboard, int value, int mask)
+{
+  return d_usrp_basic->write_io (which_dboard, value, mask);
+}
+
+int
+usrp_base::read_io (int which_dboard)
+{
+  return d_usrp_basic->read_io (which_dboard);
+}
+
+bool
+usrp_base::write_atr_mask(int which_side, int value)
+{
+  return d_usrp_basic->write_atr_mask(which_side, value);
+}
+
+bool
+usrp_base::write_atr_txval(int which_side, int value)
+{
+  return d_usrp_basic->write_atr_txval(which_side, value);
+}
+
+bool
+usrp_base::write_atr_rxval(int which_side, int value)
+{
+  return d_usrp_basic->write_atr_rxval(which_side, value);
+}
+
+bool
+usrp_base::write_aux_dac (int which_dboard, int which_dac, int value)
+{
+  return d_usrp_basic->write_aux_dac (which_dboard, which_dac, value);
+}
+
+int
+usrp_base::read_aux_adc (int which_dboard, int which_adc)
+{
+  return d_usrp_basic->read_aux_adc (which_dboard, which_adc);
+}
+
+long
+usrp_base::converter_rate() const
+{
+  return d_usrp_basic->converter_rate();
+}
+
+bool
+usrp_base::_set_led(int which_led, bool on)
+{
+  return d_usrp_basic->_set_led(which_led, on);
+}
+
+bool
+usrp_base::_write_fpga_reg (int regno, int value)
+{
+  return d_usrp_basic->_write_fpga_reg (regno, value);
+}
+
+bool
+usrp_base::_write_fpga_reg_masked (int regno, int value, int mask)
+{
+  return d_usrp_basic->_write_fpga_reg_masked (regno, value, mask);
+}
+
+int
+usrp_base::_read_fpga_reg (int regno)
+{
+  return d_usrp_basic->_read_fpga_reg (regno);
+}
+
+bool
+usrp_base::_write_9862 (int which_codec, int regno, unsigned char value)
+{
+  return d_usrp_basic->_write_9862 (which_codec, regno, value);
+}
+
+int
+usrp_base::_read_9862 (int which_codec, int regno) const
+{
+  return d_usrp_basic->_read_9862 (which_codec, regno);
+}
+
+bool
+usrp_base::_write_spi (int optional_header, int enables,
+                              int format, std::string buf)
+{
+  return d_usrp_basic->_write_spi (optional_header, enables, format, buf);
+}
+
+std::string
+usrp_base::_read_spi (int optional_header, int enables, int format, int len)
+{
+  return d_usrp_basic->_read_spi (optional_header, enables, format, len);
+}
+
+bool
+usrp_base::start()
+{
+  return d_usrp_basic->start();
+}
+
+bool
+usrp_base::stop()
+{
+  return d_usrp_basic->stop();
+}


Property changes on: 
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_base.cc
___________________________________________________________________
Name: svn:eol-style
   + native

Added: gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_base.h
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_base.h           
                (rev 0)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_base.h   
2008-11-03 00:28:28 UTC (rev 9909)
@@ -0,0 +1,420 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2008 Free Software Foundation, Inc.
+ * 
+ * This file is part of GNU Radio
+ * 
+ * GNU Radio is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 3, or (at your option)
+ * any later version.
+ * 
+ * GNU Radio is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#ifndef INCLUDED_USRP_BASE_H
+#define INCLUDED_USRP_BASE_H
+
+#include <gr_sync_block.h>
+#include <stdexcept>
+#include <memory>
+#include <boost/shared_ptr.hpp>
+#include <boost/weak_ptr.hpp>
+
+class usrp_basic;
+
+class db_base;
+typedef boost::weak_ptr<db_base> db_base_wptr;
+typedef boost::shared_ptr<db_base> db_base_sptr;
+
+/*!
+ * \brief base class for GNU Radio interface to the USRP
+ */
+class usrp_base : public gr_sync_block {
+private:
+  boost::shared_ptr<usrp_basic>        d_usrp_basic;
+
+
+protected:
+  usrp_base(const std::string &name,
+           gr_io_signature_sptr input_signature,
+           gr_io_signature_sptr output_signature)
+    : gr_sync_block(name, input_signature, output_signature) {}
+    
+
+  void set_usrp_basic(usrp_basic *u)
+  {
+    d_usrp_basic = boost::shared_ptr<usrp_basic>(u);
+  }
+
+public:
+  virtual ~usrp_base();
+
+  /*!
+   * Return a vector of size 1 or 2 that contains weak pointers
+   * to the daughterboard instance(s) associated with the specified side.
+   *
+   * \param which_side [0,1] which daughterboard
+   *
+   * N.B. To ensure proper lifetime management, the caller should
+   * continue to hold these as weak pointers, not shared pointers.  
+   * As long as the caller does not attempt to directly use the weak
+   * pointers after this usrp object has been destroyed, everything
+   * will work out fine.
+   */
+  std::vector<db_base_wptr> db(int which_side);
+
+  /*!
+   * \brief return frequency of master oscillator on USRP
+   */
+  long  fpga_master_clock_freq() const;
+
+  void set_verbose (bool on);
+
+  //! magic value used on alternate register read interfaces
+  static const int READ_FAILED = -99999;
+
+  /*!
+   * \brief Write EEPROM on motherboard or any daughterboard.
+   * \param i2c_addr           I2C bus address of EEPROM
+   * \param eeprom_offset      byte offset in EEPROM to begin writing
+   * \param buf                        the data to write
+   * \returns true iff sucessful
+   */
+  bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
+
+  /*!
+   * \brief Read EEPROM on motherboard or any daughterboard.
+   * \param i2c_addr           I2C bus address of EEPROM
+   * \param eeprom_offset      byte offset in EEPROM to begin reading
+   * \param len                        number of bytes to read
+   * \returns the data read if successful, else a zero length string.
+   */
+  std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
+
+  /*!
+   * \brief Write to I2C peripheral
+   * \param i2c_addr           I2C bus address (7-bits)
+   * \param buf                        the data to write
+   * \returns true iff successful
+   * Writes are limited to a maximum of of 64 bytes.
+   */
+  bool write_i2c (int i2c_addr, const std::string buf);
+
+  /*!
+   * \brief Read from I2C peripheral
+   * \param i2c_addr           I2C bus address (7-bits)
+   * \param len                        number of bytes to read
+   * \returns the data read if successful, else a zero length string.
+   * Reads are limited to a maximum of 64 bytes.
+   */
+  std::string read_i2c (int i2c_addr, int len);
+
+  /*!
+   * \brief Set ADC offset correction
+   * \param which      which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
+   * \param offset     16-bit value to subtract from raw ADC input.
+   */
+  bool set_adc_offset (int which_adc, int offset);
+
+  /*!
+   * \brief Set DAC offset correction
+   * \param which      which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
+   * \param offset     10-bit offset value (ambiguous format:  See AD9862 
datasheet).
+   * \param offset_pin 1-bit value.  If 0 offset applied to -ve differential 
pin;
+   *                                  If 1 offset applied to +ve differential 
pin.
+   */
+  bool set_dac_offset (int which_dac, int offset, int offset_pin);
+
+  /*!
+   * \brief Control ADC input buffer
+   * \param which_adc  which ADC[0,3]
+   * \param bypass     if non-zero, bypass input buffer and connect input
+   *                   directly to switched cap SHA input of RxPGA.
+   */
+  bool set_adc_buffer_bypass (int which_adc, bool bypass);
+
+  /*!
+   * \brief Enable/disable automatic DC offset removal control loop in FPGA
+   *
+   * \param bits  which control loops to enable
+   * \param mask  which \p bits to pay attention to
+   *
+   * If the corresponding bit is set, enable the automatic DC
+   * offset correction control loop.
+   *
+   * <pre>
+   * The 4 low bits are significant:
+   *
+   *   ADC0 = (1 << 0)
+   *   ADC1 = (1 << 1)
+   *   ADC2 = (1 << 2)
+   *   ADC3 = (1 << 3)
+   * </pre>
+   *
+   * By default the control loop is enabled on all ADC's.
+   */
+  bool set_dc_offset_cl_enable(int bits, int mask);
+
+  /*!
+   * \brief return the usrp's serial number.
+   *
+   * \returns non-zero length string iff successful.
+   */
+  std::string serial_number();
+
+  /*!
+   * \brief Return daughterboard ID for given side [0,1].
+   *
+   * \param which_side [0,1] which daughterboard
+   *
+   * \return daughterboard id >= 0 if successful
+   * \return -1 if no daugherboard
+   * \return -2 if invalid EEPROM on daughterboard
+   */
+  virtual int daughterboard_id (int which_side) const;
+
+  /*!
+   * \brief Clock ticks to delay rising of T/R signal
+   * \sa write_atr_mask, write_atr_txval, write_atr_rxval
+   */
+  bool write_atr_tx_delay(int value);
+
+  /*!
+   * \brief Clock ticks to delay falling edge of T/R signal
+   * \sa write_atr_mask, write_atr_txval, write_atr_rxval
+   */
+  bool write_atr_rx_delay(int value);
+
+  /*!
+   * \brief Set Programmable Gain Amplifier (PGA)
+   *
+   * \param which_amp  which amp [0,3]
+   * \param gain_in_db gain value (linear in dB)
+   *
+   * gain is rounded to closest setting supported by hardware.
+   *
+   * \returns true iff sucessful.
+   *
+   * \sa pga_min(), pga_max(), pga_db_per_step()
+   */
+  bool set_pga (int which_amp, double gain_in_db);
+
+  /*!
+   * \brief Return programmable gain amplifier gain setting in dB.
+   *
+   * \param which_amp  which amp [0,3]
+   */
+  double pga (int which_amp) const;
+
+  /*!
+   * \brief Return minimum legal PGA gain in dB.
+   */
+  double pga_min () const;
+
+  /*!
+   * \brief Return maximum legal PGA gain in dB.
+   */
+  double pga_max () const;
+
+  /*!
+   * \brief Return hardware step size of PGA (linear in dB).
+   */
+  double pga_db_per_step () const;
+
+  /*!
+   * \brief Write direction register (output enables) for pins that go to 
daughterboard.
+   *
+   * \param which_side [0,1] which size
+   * \param value      value to write into register
+   * \param mask       which bits of value to write into reg
+   *
+   * Each d'board has 16-bits of general purpose i/o.
+   * Setting the bit makes it an output from the FPGA to the d'board.
+   *
+   * This register is initialized based on a value stored in the
+   * d'board EEPROM.  In general, you shouldn't be using this routine
+   * without a very good reason.  Using this method incorrectly will
+   * kill your USRP motherboard and/or daughterboard.
+   */
+  bool _write_oe (int which_side, int value, int mask);
+
+  /*!
+   * \brief Write daughterboard i/o pin value
+   *
+   * \param which_side [0,1] which d'board
+   * \param value      value to write into register
+   * \param mask       which bits of value to write into reg
+   */
+  bool write_io (int which_side, int value, int mask);
+
+  /*!
+   * \brief Read daughterboard i/o pin value
+   *
+   * \param which_side [0,1] which d'board
+   * \returns register value if successful, else READ_FAILED
+   */
+  int read_io (int which_side);
+
+  /*!
+   * \brief Write daughterboard refclk config register
+   *
+   * \param which_side [0,1] which d'board
+   * \param value      value to write into register, see below
+   *
+   * <pre>
+   * Control whether a reference clock is sent to the daughterboards,
+   * and what frequency.  The refclk is sent on d'board i/o pin 0.
+   * 
+   *     3                   2                   1                       
+   *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   *  +-----------------------------------------------+-+------------+
+   *  |             Reserved (Must be zero)           |E|   DIVISOR  |
+   *  +-----------------------------------------------+-+------------+
+   * 
+   *  Bit 7  -- 1 turns on refclk, 0 allows IO use
+   *  Bits 6:0 Divider value
+   * </pre>
+   */
+  bool write_refclk(int which_side, int value);
+
+  bool write_atr_mask(int which_side, int value);
+  bool write_atr_txval(int which_side, int value);
+  bool write_atr_rxval(int which_side, int value);
+
+  /*!
+   * \brief Write auxiliary digital to analog converter.
+   *
+   * \param which_side [0,1] which d'board
+   *                   N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's.
+   *                   SLOT_TX_B and SLOT_RX_B share the same AUX DAC's.
+   * \param which_dac  [2,3] TX slots must use only 2 and 3.
+   * \param value      [0,4095]
+   * \returns true iff successful
+   */
+  bool write_aux_dac (int which_side, int which_dac, int value);
+
+  /*!
+   * \brief Read auxiliary analog to digital converter.
+   *
+   * \param which_side [0,1] which d'board
+   * \param which_adc  [0,1]
+   * \returns value in the range [0,4095] if successful, else READ_FAILED.
+   */
+  int read_aux_adc (int which_side, int which_adc);
+
+  /*!
+   * \brief returns A/D or D/A converter rate in Hz
+   */
+  long converter_rate() const;
+
+
+  // ----------------------------------------------------------------
+  // Low level implementation routines.
+  // You probably shouldn't be using these...
+  //
+
+  bool _set_led (int which_led, bool on);
+
+  /*!
+   * \brief Write FPGA register.
+   * \param regno      7-bit register number
+   * \param value      32-bit value
+   * \returns true iff successful
+   */
+  bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value
+
+  /*!
+   * \brief Read FPGA register.
+   * \param regno      7-bit register number
+   * \param value      32-bit value
+   * \returns true iff successful
+   */
+  bool _read_fpga_reg (int regno, int *value); //< 7-bit regno, 32-bit value
+
+  /*!
+   * \brief Read FPGA register.
+   * \param regno      7-bit register number
+   * \returns register value if successful, else READ_FAILED
+   */
+  int  _read_fpga_reg (int regno);
+
+  /*!
+   * \brief Write FPGA register with mask.
+   * \param regno      7-bit register number
+   * \param value      16-bit value
+   * \param mask       16-bit value
+   * \returns true if successful
+   * Only use this for registers who actually implement a mask in the verilog 
firmware, like FR_RX_MASTER_SLAVE
+   */
+  bool _write_fpga_reg_masked (int regno, int value, int mask);
+
+  /*!
+   * \brief Write AD9862 register.
+   * \param which_codec 0 or 1
+   * \param regno      6-bit register number
+   * \param value      8-bit value
+   * \returns true iff successful
+   */
+  bool _write_9862 (int which_codec, int regno, unsigned char value);
+
+  /*!
+   * \brief Read AD9862 register.
+   * \param which_codec 0 or 1
+   * \param regno      6-bit register number
+   * \returns register value if successful, else READ_FAILED
+   */
+  int  _read_9862 (int which_codec, int regno) const;
+
+  /*!
+   * \brief Write data to SPI bus peripheral.
+   *
+   * \param optional_header    0,1 or 2 bytes to write before buf.
+   * \param enables            bitmask of peripherals to write. See 
usrp_spi_defs.h
+   * \param format             transaction format.  See usrp_spi_defs.h 
SPI_FMT_*
+   * \param buf                        the data to write
+   * \returns true iff successful
+   * Writes are limited to a maximum of 64 bytes.
+   *
+   * If \p format specifies that optional_header bytes are present, they are
+   * written to the peripheral immediately prior to writing \p buf.
+   */
+  bool _write_spi (int optional_header, int enables, int format, std::string 
buf);
+
+  /*
+   * \brief Read data from SPI bus peripheral.
+   *
+   * \param optional_header    0,1 or 2 bytes to write before buf.
+   * \param enables            bitmask of peripheral to read. See 
usrp_spi_defs.h
+   * \param format             transaction format.  See usrp_spi_defs.h 
SPI_FMT_*
+   * \param len                        number of bytes to read.  Must be in 
[0,64].
+   * \returns the data read if sucessful, else a zero length string.
+   *
+   * Reads are limited to a maximum of 64 bytes.
+   *
+   * If \p format specifies that optional_header bytes are present, they
+   * are written to the peripheral first.  Then \p len bytes are read from
+   * the peripheral and returned.
+   */
+  std::string _read_spi (int optional_header, int enables, int format, int 
len);
+
+  /*!
+   * \brief Start data transfers.
+   * Called in base class to derived class order.
+   */
+  bool start ();
+
+  /*!
+   * \brief Stop data transfers.
+   * Called in base class to derived class order.
+   */
+  bool stop ();
+};
+
+#endif /* INCLUDED_USRP_BASE_H */


Property changes on: 
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_base.h
___________________________________________________________________
Name: svn:eol-style
   + native

Modified: 
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.cc
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.cc   
2008-11-02 23:28:31 UTC (rev 9908)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.cc   
2008-11-03 00:28:28 UTC (rev 9909)
@@ -1,6 +1,6 @@
 /* -*- c++ -*- */
 /*
- * Copyright 2004 Free Software Foundation, Inc.
+ * Copyright 2004,2008 Free Software Foundation, Inc.
  * 
  * This file is part of GNU Radio
  * 
@@ -21,7 +21,7 @@
  */
 
 #ifdef HAVE_CONFIG_H
-#include "config.h"
+#include <config.h>
 #endif
 
 #include <usrp_source_base.h>
@@ -43,9 +43,9 @@
                                      const std::string fpga_filename,
                                      const std::string firmware_filename
                                      ) throw (std::runtime_error)
-  : gr_sync_block (name,
-                  gr_make_io_signature (0, 0, 0),
-                  output_signature),
+  : usrp_base(name,
+             gr_make_io_signature (0, 0, 0),
+             output_signature),
     d_noverruns (0)
 {
   d_usrp = usrp_standard_rx::make (which_board, decim_rate,
@@ -57,6 +57,8 @@
   if (d_usrp == 0)
     throw std::runtime_error ("can't open usrp");
 
+  set_usrp_basic(d_usrp);
+
   // All calls to d_usrp->read must be multiples of 512 bytes.
   // We jack this up to 4k to reduce overhead.
 
@@ -65,7 +67,7 @@
 
 usrp_source_base::~usrp_source_base ()
 {
-  delete d_usrp;
+  // delete d_usrp;    // The base class deletes this via the d_usrp_basic 
instance var
 }
 
 unsigned int
@@ -74,18 +76,6 @@
   return usrp_standard_rx::format_width(d_usrp->format()) / 8;
 }
 
-bool
-usrp_source_base::start()
-{
-  return d_usrp->start();
-}
-
-bool
-usrp_source_base::stop()
-{
-  return d_usrp->stop();
-}
-
 int
 usrp_source_base::work (int noutput_items,
                         gr_vector_const_void_star &input_items,
@@ -159,18 +149,6 @@
   return d_usrp->set_rx_freq (channel, freq);
 }
 
-long
-usrp_source_base::fpga_master_clock_freq() const
-{
-  return d_usrp->fpga_master_clock_freq();
-}
-
-long
-usrp_source_base::converter_rate() const
-{
-  return d_usrp->converter_rate();
-}
-
 unsigned int
 usrp_source_base::decim_rate () const
 {
@@ -207,182 +185,8 @@
   return d_usrp->set_ddc_phase(channel, phase);
 }
 
-bool
-usrp_source_base::set_dc_offset_cl_enable(int bits, int mask)
-{
-  return d_usrp->set_dc_offset_cl_enable(bits, mask);
-}
 
-void
-usrp_source_base::set_verbose (bool verbose)
-{  
-  d_usrp->set_verbose (verbose);
-}
-
 bool
-usrp_source_base::write_aux_dac (int which_dboard, int which_dac, int value)
-{
-  return d_usrp->write_aux_dac (which_dboard, which_dac, value);
-}
-
-int
-usrp_source_base::read_aux_adc (int which_dboard, int which_adc)
-{
-  return d_usrp->read_aux_adc (which_dboard, which_adc);
-}
-
-bool
-usrp_source_base::write_eeprom (int i2c_addr, int eeprom_offset, const 
std::string buf)
-{
-  return d_usrp->write_eeprom (i2c_addr, eeprom_offset, buf);
-}
-
-std::string
-usrp_source_base::read_eeprom (int i2c_addr, int eeprom_offset, int len)
-{
-  return d_usrp->read_eeprom (i2c_addr, eeprom_offset, len);
-}
-
-bool
-usrp_source_base::write_i2c (int i2c_addr, const std::string buf)
-{
-  return d_usrp->write_i2c (i2c_addr, buf);
-}
-
-std::string
-usrp_source_base::read_i2c (int i2c_addr, int len)
-{
-  return d_usrp->read_i2c (i2c_addr, len);
-}
-
-bool
-usrp_source_base::set_pga (int which, double gain)
-{
-  return d_usrp->set_pga (which, gain);
-}
-
-double
-usrp_source_base::pga (int which) const
-{
-  return d_usrp->pga (which);
-}
-
-double
-usrp_source_base::pga_min () const
-{
-  return d_usrp->pga_min ();
-}
-
-double
-usrp_source_base::pga_max () const
-{
-  return d_usrp->pga_max ();
-}
-
-double
-usrp_source_base::pga_db_per_step () const
-{
-  return d_usrp->pga_db_per_step ();
-}
-
-int
-usrp_source_base::daughterboard_id (int which) const
-{
-  return d_usrp->daughterboard_id (which);
-}
-
-
-bool
-usrp_source_base::set_adc_offset (int which, int offset)
-{
-  return d_usrp->set_adc_offset (which, offset);
-}
-
-bool
-usrp_source_base::set_dac_offset (int which, int offset, int offset_pin)
-{
-  return d_usrp->set_dac_offset (which, offset, offset_pin);
-}
-
-bool
-usrp_source_base::set_adc_buffer_bypass (int which, bool bypass)
-{
-  return d_usrp->set_adc_buffer_bypass (which, bypass);
-}
-
-std::string
-usrp_source_base::serial_number()
-{
-  return d_usrp->serial_number();
-}
-
-bool
-usrp_source_base::_write_oe (int which_dboard, int value, int mask)
-{
-  return d_usrp->_write_oe (which_dboard, value, mask);
-}
-
-bool
-usrp_source_base::write_io (int which_dboard, int value, int mask)
-{
-  return d_usrp->write_io (which_dboard, value, mask);
-}
-
-int
-usrp_source_base::read_io (int which_dboard)
-{
-  return d_usrp->read_io (which_dboard);
-}
-
-
-
-
-// internal routines...
-
-bool
-usrp_source_base::_write_fpga_reg (int regno, int value)
-{
-  return d_usrp->_write_fpga_reg (regno, value);
-}
-
-bool
-usrp_source_base::_write_fpga_reg_masked (int regno, int value, int mask)
-{
-  return d_usrp->_write_fpga_reg_masked (regno, value, mask);
-}
-
-int
-usrp_source_base::_read_fpga_reg (int regno)
-{
-  return d_usrp->_read_fpga_reg (regno);
-}
-
-bool
-usrp_source_base::_write_9862 (int which_codec, int regno, unsigned char value)
-{
-  return d_usrp->_write_9862 (which_codec, regno, value);
-}
-
-int
-usrp_source_base::_read_9862 (int which_codec, int regno) const
-{
-  return d_usrp->_read_9862 (which_codec, regno);
-}
-
-bool
-usrp_source_base::_write_spi (int optional_header, int enables,
-                              int format, std::string buf)
-{
-  return d_usrp->_write_spi (optional_header, enables, format, buf);
-}
-
-std::string
-usrp_source_base::_read_spi (int optional_header, int enables, int format, int 
len)
-{
-  return d_usrp->_read_spi (optional_header, enables, format, len);
-}
-
-bool
 usrp_source_base::set_format(unsigned int format)
 {
   return d_usrp->set_format(format);

Modified: 
gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.h
===================================================================
--- gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.h    
2008-11-02 23:28:31 UTC (rev 9908)
+++ gnuradio/branches/developers/eb/cppdb-wip/gr-usrp/src/usrp_source_base.h    
2008-11-03 00:28:28 UTC (rev 9909)
@@ -20,10 +20,10 @@
  * Boston, MA 02110-1301, USA.
  */
 
-#ifndef INCLUDED_USRP1_SOURCE_BASE_H
-#define INCLUDED_USRP1_SOURCE_BASE_H
+#ifndef INCLUDED_USRP_SOURCE_BASE_H
+#define INCLUDED_USRP_SOURCE_BASE_H
 
-#include <gr_sync_block.h>
+#include <usrp_base.h>
 #include <stdexcept>
 
 class usrp_standard_rx;
@@ -31,7 +31,7 @@
 /*!
  * \brief abstract interface to Universal Software Radio Peripheral Rx path 
(Rev 1)
  */
-class usrp_source_base : public gr_sync_block {
+class usrp_source_base : public usrp_base {
  private:
   usrp_standard_rx     *d_usrp;
   int                   d_noverruns;
@@ -83,18 +83,12 @@
                                      int &bytes_read) = 0;
 
  public:
-  //! magic value used on alternate register read interfaces
-  static const int READ_FAILED = -99999;
-
   ~usrp_source_base ();
 
   int work (int noutput_items,
            gr_vector_const_void_star &input_items,
            gr_vector_void_star &output_items);
 
-  bool start();
-  bool stop();
-
   /*!
    * \brief Set decimator rate.  \p rate must be EVEN and in [8, 256].
    *
@@ -119,8 +113,6 @@
    */
   bool set_fpga_mode (int mode);
 
-  void set_verbose (bool verbose);
-
   /*!
    * \brief Set the digital down converter phase register.
    *
@@ -129,46 +121,6 @@
    */
   bool set_ddc_phase(int channel, int phase);
 
-  /*!
-   * \brief Set Programmable Gain Amplifier (PGA)
-   *
-   * \param which      which A/D [0,3]
-   * \param gain_in_db gain value (linear in dB)
-   *
-   * gain is rounded to closest setting supported by hardware.
-   *
-   * \returns true iff sucessful.
-   *
-   * \sa pga_min(), pga_max(), pga_db_per_step()
-   */
-  bool set_pga (int which, double gain_in_db);
-
-  /*!
-   * \brief Return programmable gain amplifier gain setting in dB.
-   *
-   * \param which      which A/D [0,3]
-   */
-  double pga (int which) const;
-
-  /*!
-   * \brief Return minimum legal PGA setting in dB.
-   */
-  double pga_min () const;
-
-  /*!
-   * \brief Return maximum legal PGA setting in dB.
-   */
-  double pga_max () const;
-
-  /*!
-   * \brief Return hardware step size of PGA (linear in dB).
-   */
-  double pga_db_per_step () const;
-
-  // ACCESSORS
-
-  long fpga_master_clock_freq() const;
-  long converter_rate() const;
   long adc_rate() const { return converter_rate(); }   // alias
   long adc_freq() const { return converter_rate(); }   // deprecated alias
 
@@ -179,159 +131,6 @@
   int noverruns () const { return d_noverruns; }
 
   /*!
-   * \brief Return daughterboard ID for given Rx daughterboard slot [0,1].
-   *
-   * \return daughterboard id >= 0 if successful
-   * \return -1 if no daugherboard
-   * \return -2 if invalid EEPROM on daughterboard
-   */
-  int daughterboard_id (int which_dboard) const;
-
-  /*!
-   * \brief Write auxiliary digital to analog converter.
-   *
-   * \param which_dboard       [0,1] which d'board
-   *                           N.B., SLOT_TX_A and SLOT_RX_A share the same 
AUX DAC's.
-   *                           SLOT_TX_B and SLOT_RX_B share the same AUX 
DAC's.
-   * \param which_dac          [2,3] TX slots must use only 2 and 3.
-   * \param value              [0,4095]
-   * \returns true iff successful
-   */
-  bool write_aux_dac (int which_board, int which_dac, int value);
-
-  /*!
-   * \brief Read auxiliary analog to digital converter.
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \param which_adc          [0,1]
-   * \returns value in the range [0,4095] if successful, else READ_FAILED.
-   */
-  int read_aux_adc (int which_dboard, int which_adc);
-
-  /*!
-   * \brief Write EEPROM on motherboard or any daughterboard.
-   * \param i2c_addr           I2C bus address of EEPROM
-   * \param eeprom_offset      byte offset in EEPROM to begin writing
-   * \param buf                        the data to write
-   * \returns true iff sucessful
-   */
-  bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
-
-  /*!
-   * \brief Write EEPROM on motherboard or any daughterboard.
-   * \param i2c_addr           I2C bus address of EEPROM
-   * \param eeprom_offset      byte offset in EEPROM to begin reading
-   * \param len                        number of bytes to read
-   * \returns the data read if successful, else a zero length string.
-   */
-  std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
-
-  /*!
-   * \brief Write to I2C peripheral
-   * \param i2c_addr           I2C bus address (7-bits)
-   * \param buf                        the data to write
-   * \returns true iff successful
-   * Writes are limited to a maximum of of 64 bytes.
-   */
-  bool write_i2c (int i2c_addr, const std::string buf);
-
-  /*!
-   * \brief Read from I2C peripheral
-   * \param i2c_addr           I2C bus address (7-bits)
-   * \param len                        number of bytes to read
-   * \returns the data read if successful, else a zero length string.
-   * Reads are limited to a maximum of of 64 bytes.
-   */
-  std::string read_i2c (int i2c_addr, int len);
-
-  /*!
-   * \brief Set ADC offset correction
-   * \param which      which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
-   * \param offset     16-bit value to subtract from raw ADC input.
-   */
-  bool set_adc_offset (int which, int offset);
-
-  /*!
-   * \brief Set DAC offset correction
-   * \param which      which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
-   * \param offset     10-bit offset value (ambiguous format:  See AD9862 
datasheet).
-   * \param offset_pin 1-bit value.  If 0 offset applied to -ve differential 
pin;
-   *                                  If 1 offset applied to +ve differential 
pin.
-   */
-  bool set_dac_offset (int which, int offset, int offset_pin);
-
-  /*!
-   * \brief Control ADC input buffer
-   * \param which      which ADC[0,3]
-   * \param bypass     if non-zero, bypass input buffer and connect input
-   *                   directly to switched cap SHA input of RxPGA.
-   */
-  bool set_adc_buffer_bypass (int which, bool bypass);
-
-  /*!
-   * \brief return the usrp's serial number.
-   *
-   * \returns non-zero length string iff successful.
-   */
-  std::string serial_number();
-
-  /*!
-   * \brief Write direction register (output enables) for pins that go to 
daughterboard.
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \param value              value to write into register
-   * \param mask               which bits of value to write into reg
-   *
-   * Each d'board has 16-bits of general purpose i/o.
-   * Setting the bit makes it an output from the FPGA to the d'board.
-   *
-   * This register is initialized based on a value stored in the
-   * d'board EEPROM.  In general, you shouldn't be using this routine
-   * without a very good reason.  Using this method incorrectly will
-   * kill your USRP motherboard and/or daughterboard.
-   */
-  bool _write_oe (int which_dboard, int value, int mask);
-
-  /*!
-   * \brief Write daughterboard i/o pin value
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \param value              value to write into register
-   * \param mask               which bits of value to write into reg
-   */
-  bool write_io (int which_dboard, int value, int mask);
-
-  /*!
-   * \brief Read daughterboard i/o pin value
-   *
-   * \param which_dboard       [0,1] which d'board
-   * \returns register value if successful, else READ_FAILED
-   */
-  int read_io (int which_dboard);
-
-  /*!
-   * \brief Enable/disable automatic DC offset removal control loop in FPGA
-   *
-   * \param bits  which control loops to enable
-   * \param mask  which \p bits to pay attention to
-   *
-   * If the corresponding bit is set, enable the automatic DC
-   * offset correction control loop.
-   *
-   * <pre>
-   * The 4 low bits are significant:
-   *
-   *   ADC0 = (1 << 0)
-   *   ADC1 = (1 << 1)
-   *   ADC2 = (1 << 2)
-   *   ADC3 = (1 << 3)
-   * </pre>
-   *
-   * By default the control loop is enabled on all ADC's.
-   */
-  bool set_dc_offset_cl_enable(int bits, int mask);
-
-  /*!
    * \brief Specify Rx data format.
    *
    * \param format     format specifier
@@ -373,83 +172,6 @@
   static bool format_want_q(unsigned int format);
   static bool format_bypass_halfband(unsigned int format);
 
-  // ----------------------------------------------------------------
-  // internal routines...  
-  // You probably shouldn't be using these...
-  // ----------------------------------------------------------------
-
-  /*!
-   * \brief Write FPGA register.
-   * \param regno      7-bit register number
-   * \param value      32-bit value
-   * \returns true iff successful
-   */
-  bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value
-
-  /*!
-   * \brief Write FPGA register masked.
-   * \param regno      7-bit register number
-   * \param value      16-bit value
-   * \param mask               16-bit mask
-   * \returns true iff successful
-   */
-  bool _write_fpga_reg_masked (int regno, int value, int mask);        //< 
7-bit regno, 16-bit value, 16-bit mask
-
-  /*!
-   * \brief Read FPGA register.
-   * \param regno      7-bit register number
-   * \returns register value if successful, else READ_FAILED
-   */
-  int  _read_fpga_reg (int regno);
-
-  /*!
-   * \brief Write AD9862 register.
-   * \param which_codec 0 or 1
-   * \param regno      6-bit register number
-   * \param value      8-bit value
-   * \returns true iff successful
-   */
-  bool _write_9862 (int which_codec, int regno, unsigned char value);
-
-  /*!
-   * \brief Read AD9862 register.
-   * \param which_codec 0 or 1
-   * \param regno      6-bit register number
-   * \returns register value if successful, else READ_FAILED
-   */
-  int  _read_9862 (int which_codec, int regno) const;
-
-  /*!
-   * \brief Write data to SPI bus peripheral.
-   *
-   * \param optional_header    0,1 or 2 bytes to write before buf.
-   * \param enables            bitmask of peripherals to write. See 
usrp_spi_defs.h
-   * \param format             transaction format.  See usrp_spi_defs.h 
SPI_FMT_*
-   * \param buf                        the data to write
-   * \returns true iff successful
-   * Writes are limited to a maximum of 64 bytes.
-   *
-   * If \p format specifies that optional_header bytes are present, they are
-   * written to the peripheral immediately prior to writing \p buf.
-   */
-  bool _write_spi (int optional_header, int enables, int format, std::string 
buf);
-
-  /*
-   * \brief Read data from SPI bus peripheral.
-   *
-   * \param optional_header    0,1 or 2 bytes to write before buf.
-   * \param enables            bitmask of peripheral to read. See 
usrp_spi_defs.h
-   * \param format             transaction format.  See usrp_spi_defs.h 
SPI_FMT_*
-   * \param len                        number of bytes to read.  Must be in 
[0,64].
-   * \returns the data read if sucessful, else a zero length string.
-   *
-   * Reads are limited to a maximum of 64 bytes.
-   *
-   * If \p format specifies that optional_header bytes are present, they
-   * are written to the peripheral first.  Then \p len bytes are read from
-   * the peripheral and returned.
-   */
-  std::string _read_spi (int optional_header, int enables, int format, int 
len);
 };
 
-#endif /* INCLUDED_USRP1_SOURCE_BASE_H */
+#endif /* INCLUDED_USRP_SOURCE_BASE_H */