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[Bug-gnupress] Further mods to gcc.006.txt (#7)
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From: |
Paul A. Crable |
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Subject: |
[Bug-gnupress] Further mods to gcc.006.txt (#7) |
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Date: |
Fri, 23 May 2003 08:46:07 -0700 |
I propose these changes to section 3.17.10 of gcc.006.txt:
---------------------------------------
Replace
"-mpower
"-mno-power
"-mpower2
"-mno-power2
"-mpowerpc
"-mno-powerpc
"-mpowerpc-gpopt
"-mno-powerpc-gpopt
"-mpowerpc-gfxopt
"-mno-powerpc-gfxopt
"-mpowerpc64
"-mno-powerpc64
"GCC supports two related instruction set architectures for the
RS/6000 and PowerPC. The POWER instruction set are those instructions
supported by the `rios' chip set used in the original RS/6000 systems
and the PowerPC instruction set is the architecture of the Motorola
MPC5xx, MPC6xx, MPC8xx microprocessors, and the IBM 4xx
microprocessors.
"Neither architecture is a subset of the other. However there is a
large common subset of instructions supported by both. An MQ register
is included in processors supporting the POWER architecture.
"You use these options to specify which instructions are available on
the processor you are using. The default value of these options is
determined when configuring GCC. Specifying the `-mcpu=cpu_type'
overrides the specification of these options. We recommend you use
the `-mcpu=cpu_type' option rather than the options listed above. The
`-mpower' option allows GCC to generate instructions that are found
only in the POWER architecture and to use the MQ register. Specifying
`-mpower2' implies `-power' and also allows GCC to generate
instructions that are present in the POWER2 architecture but not the
original POWER architecture.
"The `-mpowerpc' option allows GCC to generate instructions that are
found only in the 32bit subset of the PowerPC architecture. Spec
ifying `-mpowerpc-gpopt' implies `-mpowerpc' and also allows GCC to
use the optional PowerPC architecture instructions in the General
Purpose group, including floatingpoint square root. Specifying
`-mpowerpc-gfxopt' implies `-mpowerpc' and also allows GCC to use the
optional PowerPC architecture instructions in the Graphics group,
including floatingpoint select.
"The `-mpowerpc64' option allows GCC to generate the additional 64
bit instructions that are found in the full PowerPC64 architecture
and to treat GPR's as 64bit, double word quantities. GCC defaults to
`-mno-powerpc64'.
"If you specify both `-mno-power' and `-mno-powerpc', GCC will use
only the instructions in the common subset of both architectures plus
some special AIX commonmode calls, and will not use the MQ register.
Specifying both `-mpower' and `-mpowerpc' permits GCC to use any in
struction from either architecture and to allow use of the MQ
register; specify this for the Motorola MPC601."
with
"-mpower
"-mno-power
"-mpower2
"-mno-power2
"-mpowerpc
"-mno-powerpc
"-mpowerpc-gpopt
"-mno-powerpc-gpopt
"-mpowerpc-gfxopt
"-mno-powerpc-gfxopt
"-mpowerpc64
"-mno-powerpc64
"GCC supports two instruction sets for the
RS/6000 and PowerPC. The POWER instruction set
includes those instructions supported by the
`rios' chip set used in the original RS/6000
systems. The PowerPC instruction set, on the
other hand, is the architecture of the
Motorola MPC5xx, MPC6xx, and MPC8xx
microprocessors, and the IBM 4xx
microprocessor. The two sets have many
instructions in common, but each also has
instructions unique to itself. Also, the
POWER architecture supports an MQ register.
"The options above allow you to specify which
instructions are available on the target
processor. The default option is determined
when configuring GCC, but that default value
can be overridden by specifying `-
mcpu=cpu_type'. Use the `-mcpu=cpu_type'
option rather than the options listed above to
override the option specified when GCC was
configured.
"-mpower directs GCC to generate instructions
only for the POWER architecture and to use the
MQ register.
"-mpower2 directs GCC to generate instructions
for the POWER architecture, to use the MQ
register, and to generate instructions in the
POWER2 architecture.
"-mpowerpc directs GCC to generate
instructions that are found only in the 32bit
subset of the PowerPC architecture.
"-mpowerpc-gpopt directs GCC to generate
instructions that are found only in the 32bit
subset of the PowerPC architecture, and to use
the optional PowerPC architecture instructions
in the General Purpose group, including
floatingpoint square root.
"-mpowerpc-gfxopt directs GCC to generate
instructions that are found only in the 32bit
subset of the PowerPC architecture and to use
the PowerPC architecture instructions in the
Graphics group, including floatingpoint
select.
"-mpowerpc64 directs GCC to generate the
additional 64bit instructions that are found
in the full PowerPC64 architecture and to
treat GPR's as 64bit, double word quantities.
"If you specify both `-mno-power' and `-mno-
powerpc', GCC will use only the instructions
common to both architectures plus some special
AIX commonmode calls, and will not use the MQ
register. Specifying both `-mpower' and `-
mpowerpc' permits GCC to use any instruction
from either architecture and to allow use of
the MQ register; specify this for the Motorola
MPC601."
Replace
"-mnew-mnemonics
"-mold-mnemonics
"Select which mnemonics to use in the generated assembler code. With
`-mnew-mnemonics', GCC uses the assembler mnemonics defined for the
PowerPC architecture. With `-mold-mnemonics' it uses the assembler
mnemonics defined for the POWER architecture. Instructions defined in
only one architecture have only one mnemonic; GCC uses that mnemonic
irrespective of which of these options is specied. GCC defaults to
the mnemonics appropriate for the architecture in use. Specifying
`-mcpu=cpu_type' sometimes overrides the value of these option.
Unless you are building a crosscompiler, you should normally not
specify either `-mnew-mnemonics' or `-mold-mnemonics', but should
instead accept the default."
with
"-mnew-mnemonics
"-mold-mnemonics
"Use the PowerPC (-mnew-mnemonics) or the
POWER (-mold-mnemonics) assembler mnemonics.
GCC defaults to the mnemonics appropriate for
the architecture in use. Specifying `-
mcpu=cpu_type' sometimes overrides the value
of these options. Unless you are building a
crosscompiler, you should omit both of these
options."
Replace
"-mcpu=cpu_type
"Set architecture type, register usage, choice of mnemonics, and
instruction scheduling parameters for machine type cpu_type.
Supported values for cpu type are `rios', `rios1', `rsc', `rios2',
`rs64a', `601', `602', `603', `603e', `604', `604e', `620', `630',
`740', `7400', `7450', `750', `power', `power2', `powerpc', `403',
`505', `801', `821', `823', and `860' and `common'.
"`-mcpu=common' selects a completely generic processor. Code
generated
under this option will run on any POWER or PowerPC processor.
GCC will use only the instructions in the common subset of both
architectures, and will not use the MQ register. GCC assumes a
generic processor model for scheduling purposes.
"`-mcpu=power', `-mcpu=power2', `-mcpu=powerpc', and
`-mcpu=powerpc64'
specify generic POWER, POWER2, pure 32bit PowerPC (i.e., not
MPC601), and 64bit PowerPC architecture machine types, with an
appropriate, generic processor model assumed for scheduling pur
poses.
"The other options specify a specific processor. Code generated under
those options will run best on that processor, and may not run at all
on others.
"The `-mcpu' options automatically enable or disable other `-m'
options
as follows:
`common' `-mno-power', `-mno-powerpc'
`power'
`power2'
`rios1'
`rios2'
`rsc' `-mpower', `-mno-powerpc', `-mno-new-mnemonics'
`powerpc'
`rs64a'
`602'
`603'
`603e'
`604'
`620'
`630'
`740'
`7400'
`7450'
`750'
`505' `-mno-power', `-mpowerpc', `-mnew-mnemonics'
`601' `-mpower', `-mpowerpc', `-mnew-mnemonics'
`403'
`821'
`860' `-mno-power', `-mpowerpc', `-mnew-mnemonics',
`-msoft-float'"
with
"-mcpu=cpu_type
"Set architecture type, register usage, choice
of mnemonics, and instruction scheduling
parameters for machine type cpu_type.
Supported values for cpu type are `rios',
`rios1', `rsc', `rios2', `rs64a', `601',
`602', `603', `603e', `604', `604e', `620',
`630', `740', `7400', `7450', `750', `power',
`power2', `powerpc', `403', `505', `801',
`821', `823', and `860' and `common':
common--Causes GCC to produce output that
will run on every POWER or PowerPC
processor. GCC not use the MQ register.
power--Produce output for a generic POWER
processor.
power2--Produce output for a generic
POWER2 processor.
powerpc----Produce output for a pure 32-
bit PowerPC (i.e., not MPC601)
powerpc64--Produce output for a 64bit
PowerPC architecture machine
The remaining options specify a specific
processor. Code generated under those
options will run best on that processor
but with unpredictable results on other
processors.
The `-mcpu' options automatically enable
or disable other `-m' options as follows:
`common' `-mno-power', `-mno-powerpc'
`power'
`power2'
`rios1'
`rios2'
`rsc' `-mpower', `-mno-powerpc', `-mno-new-mnemonics'
`powerpc'
`rs64a'
`602'
`603'
`603e'
`604'
`620'
`630'
`740'
`7400'
`7450'
`750'
`505' `-mno-power', `-mpowerpc', `-mnew-mnemonics'
`601' `-mpower', `-mpowerpc', `-mnew-mnemonics'
`403'
`821'
`860' `-mno-power', `-mpowerpc', `-mnew-mnemonics', `-msoft-float'"
????????????? The preceding list is unclear.
Replace
"-maltivec
"-mno-altivec
"These switches enable or disable the use of builtin functions that
al low access to the AltiVec instruction set. You may also need to
set `-mabi=altivec' to adjust the current ABI with AltiVec ABI
enhance ments."
with
"-maltivec
"-mno-altivec
"These switches enable (-maltivec) or disable
(-mno-altivec) the use of builtin functions
that allow access to the AltiVec instruction
set. You may also need to set `-mabi=altivec'
to adjust the current ABI with AltiVec ABI
enhancements."
Replace
"-mabi=spe
"Extend the current ABI with SPE ABI extensions. This does not change
the default ABI, instead it adds the SPE ABI extensions to the
current ABI.
"-mabi=no-spe
"Disable Booke SPE ABI extensions for the current ABI."
with
-mabi=spe
-mabi=no-spe
"Extend (spe) or do not extend (no-spe) the
current ABI with SPE ABI extensions.
Specifying spe adds the SPE ABI extensions to
the current ABI. The default value is
?????????????"
Replace
"-misel=yes/no
"-misel
"This switch enables or disables the generation of ISEL
instructions."
with
"-misel=yes
"-misel=no
"-misel
Generate (-misel or -misel=yes) or do not
generate (-misel=no) ISEL instructions. The
default value is ???????????."
Replace
"-mfull-toc
"-mno-fp-in-toc
"-mno-sum-in-toc
"-mminimal-toc
"Modify generation of the TOC (Table Of Contents), which is created
for every executable le. The `-mfull-toc' option is selected by
default. In that case, GCC will allocate at least one TOC entry for
each unique nonautomatic variable reference in your program. GCC
will also place oatingpoint constants in the TOC. However, only
16,384 entries are available in the TOC.
"If you receive a linker error message that saying you have over
owed the available TOC space, you can reduce the amount of TOC space
used with the `-mno-fp-in-toc' and `-mno-sum-in-toc' options.
`-mno-fp-in-toc' prevents GCC from putting oatingpoint constants in
the TOC and `-mno-sum-in-toc' forces GCC to generate code to cal
culate the sum of an address and a constant at runtime instead of
putting that sum into the TOC. You may specify one or both of these
options. Each causes GCC to produce very slightly slower and larger
code at the expense of conserving TOC space.
"If you still run out of space in the TOC even when you specify both
of these options, specify `-mminimal-toc' instead. This option causes
GCCto make only one TOCentry for every le. When you specify this
option, GCC will produce code that is slower and larger but which
uses extremely little TOC space. You may wish to use this option only
on les that contain less frequently executed code."
with
"-mfull-toc
"-mno-fp-in-toc
"-mno-sum-in-toc
"-mminimal-toc
"Modify generation of the Table Of Contents,
TOC, created for executable files. `-mfull-
toc' is set by default. GCC will allocate at
least one TOC entry for each unique
nonautomatic variable reference in the
program. It will also place floatingpoint
constants in the TOC. The TOC is limited to
16,384 entries.
"Two options allow you to prevent a linker
error message indicating you have overflowed
the available TOC space. `-mno-fp-in-toc'
prevents GCC from putting floatingpoint
constants in the TOC. `-mno-sum-in-toc'
prevents GCC from generating code to calculate
the sum of an address and a constant at
runtime instead of putting that sum into the
TOC. You may specify both options; each
causes GCC to produce slower and larger code
at the expense of conserving TOC space.
"A third option, -mminimal-toc will save even
more space. Use this instead of -mno-fp-in-toc
and -mno-sum-in-toc. -mminimal-toc causes GCC
to make a single TOC entry for each file.
Specifying this option will produce slower and
larger code but use little TOC space.
Consider using this option only on files that
contain less frequently executed code."
Replace
"-maix64
"-maix32
"Enable 64bit AIX ABI and calling convention: 64bit pointers,
64bit long type, and the infrastructure needed to support them.
Specifying `-maix64' implies `-mpowerpc64' and `-mpowerpc', while
`-maix32' disables the 64bit ABI and implies `-mno-powerpc64'. If
neither is specified, GCC assumes -maix32 is set."
with
"-maix64
"-maix32
"Enable (-maix64) or do not enable (-maix32)
64bit AIX ABI and calling convention: 64bit
pointers, 64bit long type, and the
infrastructure needed to support them.
Specifying `-maix64' implies `-mpowerpc64' and
`-mpowerpc', while `-maix32' disables the
64bit ABI and implies `-mno-powerpc64'. If
neither is specified, GCC assumes -maix32 is
set."
Replace
"-msoft-float
"-mhard-float
"Generate code that does not use (uses) the oatingpoint register
set. Software oating point emulation is provided if you use the
`-msoft-float' option, and pass the option to GCC when linking."
with
"-msoft-float
"-mhard-float
"Generate output that uses (-mhard-float) or
does not use (-msoft-float) the floatingpoint
register set. GCC will provide software
emulation of floating point instructions if -
msoft-float is set. If neither is specified,
then ??????????? is assumed by default."
Replace
"-mmultiple
"-mno-multiple
"Generate code that uses (does not use) the load multiple word
instruc tions and the store multiple word instructions. These
instructions are generated by default on POWER systems, and not
generated on PowerPC systems. Do not use `-mmultiple' on little
endian PowerPC systems, since those instructions do not work when the
processor is in little endian mode. The exceptions are PPC740 and
PPC750 which permit the instructions usage in little endian mode."
with
"-mmultiple
"-mno-multiple
"Generate code that uses (-mmultiple) or does
not use (-mno-multiple) the LOAD MULTIPLE and
STORE MULTIPLE word instructions. On POWER
systems -mmultiple is the default, and on
PowerPC systems, -mno-multiple. Except for
the PPC740 and PPC750, do not use `-mmultiple'
on little endian PowerPC systems."
Replace
"-mstring
"-mno-string
"Generate code that uses (does not use) the load string instructions
and the store string word instructions to save multiple registers and
do small block moves. These instructions are generated by default on
POWER systems, and not generated on PowerPC systems. Do not use
`-mstring' on little endian PowerPC systems, since those instructions
do not work when the processor is in little endian mode. The excep
tions are PPC740 and PPC750 which permit the instructions usage in
little endian mode."
with
"-mstring
"-mno-string
"Generate code that uses (-mstring) or does
not use (-mno-string) the LOAD STRING and
STORE STRING word instructions. Setting -
mstring saves multiple registers and allows
small block moves. On POWER systems -mstring
is the default, and on PowerPC systems, -mno-
nostring. Except for the PPC740 and PPC750,
do not use `-mstring' on little endian PowerPC
systems."
Replace
"-mupdate
"-mno-update
"Generate code that uses (does not use) the load or store
instructions that update the base register to the address of the
calculated memory location. These instructions are generated by
default. If you use `-mno-update', there is a small window between
the time that the stack pointer is updated and the address of the
previous frame is stored, which means code that walks the stack frame
across interrupts or signals may get corrupted data."
with
"-mupdate
"-mno-update
"Generate output that uses (-mupdate) or does
not use (-mno-update) the load or store
instructions that update the base register to
the address of the calculated memory location.
If neither option is specified, -mupdate is
assumed set by default. If -mno-update is
set, a delay exists between updating the stack
pointer and storing the address of the
previous frame. This delay may cause
unpredictable result in code that walks the
stack frame across interrupts."
Replace
"-mfused-madd
"-mno-fused-madd
"Generate code that uses (does not use) the oating point multiply
and accumulate instructions. These instructions are generated by
default if hardware oating is used."
with
"-mfused-madd
"-mno-fused-madd
"Generate code that uses (-mfused-madd) or
does not use (-mno-fused-madd) the floating
point multiply and accumulate instructions.
If hardware floating point processing is in
use, -mfused-madd is set by default;
otherwise, ???????????? is set by default."
Replace
"-mno-bit-align
"-mbit-align
"On System V.4 and embedded PowerPC systems do not (do) force
structures and unions that contain bitelds to be aligned to the
base type of the biteld. For example, by default a structure
containing nothing but 8 unsigned bitelds of length 1 would be
aligned to a 4 byte boundary and have a size of 4 bytes. By using
`-mno-bit-align', the structure would be aligned to a 1 byte boundary
and be one byte in size."
with
"-mno-bit-align
"-mbit-align
"On System V.4 and embedded PowerPC systems
force (-mbit-align) or do not force (-mno-bit-
align) structures and unions that contain bit
fields to be aligned to the base type of the
bit field. If neither option is specified,
then -mbit-align is set by default. As an
example of usage, a structure containing only
eight unsigned bit fields each of length one
normally would be aligned to a four byte
boundary and have a size of four bytes. By
using `-mno-bit-align', however, the structure
would be aligned to a one byte boundary and be
one byte in size."
Replace
"-mno-strict-align
"-mstrict-align
"On System V.4 and embedded PowerPC systems do not (do) assume that
unaligned memory references will be handled by the system.
with
"-mno-strict-align
"-mstrict-align
"On System V.4 and embedded PowerPC systems,
assume (-mstrict-align) or do not assume (-
mno-strict-align) that unaligned memory
references will be handled by the system.
Both options are ignored for other systems.
If neither option is specified for System V.4
and embedded PowerPC systems, then ???????? is
assumed set by default."
Replace
"-mrelocatable
"-mno-relocatable
"On embedded PowerPC systems generate code that allows (does not
allow) the program to be relocated to a different address at runtime.
If you use `-mrelocatable' on any module, all objects linked together
must be compiled with `-mrelocatable' or `-mrelocatable-lib'."
with
"-mrelocatable
"-mno-relocatable
"On embedded PowerPC systems, generate output
that allows the program to be relocated (-
mrelocatable) or prevents the program from
being relocated (-mno-relocatable) to a
different address at runtime. If you use `-
mrelocatable' on any module, then all objects
must be compiled with either `-mrelocatable'
or `-mrelocatable-lib'."
Paul A. Crable. Portland, Oregon, USA
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